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GAL26CV12C-10LPI PDF预览

GAL26CV12C-10LPI

更新时间： 2024-11-09 22:20:19
品牌 Logo 应用领域
莱迪思 - LATTICE 可编程逻辑器件光电二极管输入元件时钟
页数 文件大小 规格书
17页 256K
描述
High Performance E2CMOS PLD Generic Array Logic

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中文翻译

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GAL26CV12C-10LPI 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：PLASTIC, DIP-28
针数：28Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.82Is Samacsys：N
其他特性：REGISTER PRELOAD; POWER-UP RESET架构：PAL-TYPE
最大时钟频率：71.4 MHzJESD-30 代码：R-PDIP-T28
JESD-609代码：e0长度：34.671 mm
专用输入次数：13I/O 线路数量：12
输入次数：26输出次数：12
产品条款数：122端子数量：28
最高工作温度：85 °C最低工作温度：-40 °C
组织：13 DEDICATED INPUTS, 12 I/O输出函数：MACROCELL
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP28,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：225
电源：5 V可编程逻辑类型：EE PLD
传播延迟：10 ns认证状态：Not Qualified
座面最大高度：4.57 mm子类别：Programmable Logic Devices
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：NO
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn85Pb15)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：7.62 mm
Base Number Matches：1

GAL26CV12C-10LPI 数据手册

 浏览型号GAL26CV12C-10LPI的Datasheet PDF文件第2页浏览型号GAL26CV12C-10LPI的Datasheet PDF文件第3页浏览型号GAL26CV12C-10LPI的Datasheet PDF文件第4页浏览型号GAL26CV12C-10LPI的Datasheet PDF文件第5页浏览型号GAL26CV12C-10LPI的Datasheet PDF文件第6页浏览型号GAL26CV12C-10LPI的Datasheet PDF文件第7页 
GAL26CV12  
High Performance E2CMOS PLD  
Generic Array Logic™  
Features  
Functional Block Diagram  
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY  
— 7.5 ns Maximum Propagation Delay  
— Fmax = 142.8 MHz  
I/CLK  
INPUT  
I/O/Q  
RESET  
8
— 4.5ns Maximum from Clock Input to Data Output  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
I
I
I
I
I
I
I
I
I
I
I
I
— TTL Compatible 16 mA Outputs  
— UltraMOS® Advanced CMOS Technology  
8
8
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
• ACTIVE PULL-UPS ON ALL PINS  
• LOW POWER CMOS  
— 90 mA Typical Icc  
• E2 CELL TECHNOLOGY  
— Reconfigurable Logic  
— Reprogrammable Cells  
— 100% Tested/100% Yields  
— High Speed Electrical Erasure (<100ms)  
— 20 Year Data Retention  
8
10  
12  
12  
10  
8
• TWELVE OUTPUT LOGIC MACROCELLS  
— Uses Standard 22V10 Macrocells  
— Maximum Flexibility for Complex Logic Designs  
• PRELOAD AND POWER-ON RESET OF REGISTERS  
— 100% Functional Testability  
• APPLICATIONS INCLUDE:  
— DMA Control  
— State Machine Control  
— High Speed Graphics Processing  
— Standard Logic Speed Upgrade  
8
8
8
• ELECTRONIC SIGNATURE FOR IDENTIFICATION  
PRESET  
Description  
The GAL26CV12, at 7.5 ns maximum propagation delay time,  
combines a high performance CMOS process with Electrically  
Erasable (E2) floating gate technology to provide the highest  
performance 28-pin PLD available on the market. E2 technology  
offers high speed (<100ms) erase times, providing the ability to  
reprogram or reconfigure the device quickly and efficiently.  
Pin Configuration  
DIP  
1
28  
I
I/CLK  
PLCC  
I/O/Q  
I
Expanding upon the industry standard 22V10 architecture, the  
GAL26CV12 eliminates the learning curve typically associated with  
using a new device architecture. The generic architecture provides  
maximum design flexibility by allowing the Output Logic Macrocell  
(OLMC) to be configured by the user. The GAL26CV12 OLMC is  
fully compatible with the OLMC in standard bipolar and CMOS  
22V10 devices.  
I
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
GND  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I
GAL  
4
2
28  
26  
25  
I
26CV12  
5
7
I
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
GND  
I/O/Q  
I/O/Q  
I
I
Vcc  
7
VCC  
23  
GAL26CV12  
Top View  
I
I
I
I
21  
I
I
I
I
9
21  
19  
Unique test circuitry and reprogrammable cells allow completeAC,  
DC, and functional testing during manufacture. As a result, Lattice  
Semiconductor delivers100% field programmability and functionality  
of all GAL products. In addition, 100 erase/write cycles and data  
retention in excess of 20 years are specified.  
11  
12  
14  
16  
18  
I
I
14  
15 I/O/Q  
I
Copyright © 2000 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject  
to change without notice.  
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.  
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com  
June 2000  
26cv12_03  
1
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中文翻译

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GAL26CV12C-10LPI 替代型号

型号 品牌 替代类型 描述 数据表
GAL26CV12B-20LP LATTICE

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GAL26CV12B-10LP LATTICE

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 High Performance E2CMOS PLD Generic Array Logic

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