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GAL16VP8B-15LJ PDF预览

GAL16VP8B-15LJ

更新时间： 2024-11-07 22:26:55
品牌 Logo 应用领域
莱迪思 - LATTICE 可编程逻辑器件输入元件时钟
页数 文件大小 规格书
17页 214K
描述
High-Speed E2CMOS PLD Generic Array Logic

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中文翻译

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GAL16VP8B-15LJ 技术参数

是否Rohs认证：不符合生命周期：Obsolete
零件包装代码：QLCC包装说明：PLASTIC, LCC-20
针数：20Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.84Is Samacsys：N
其他特性：REGISTER PRELOAD; POWER-UP RESET架构：PAL-TYPE
最大时钟频率：55.5 MHzJESD-30 代码：S-PQCC-J20
JESD-609代码：e0长度：8.9662 mm
湿度敏感等级：1专用输入次数：8
I/O 线路数量：8输入次数：18
输出次数：8产品条款数：64
端子数量：20最高工作温度：75 °C
最低工作温度：组织：8 DEDICATED INPUTS, 8 I/O
输出函数：MACROCELL封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC20,.4SQ
封装形状：SQUARE封装形式：CHIP CARRIER
电源：5 V可编程逻辑类型：EE PLD
传播延迟：15 ns认证状态：Not Qualified
座面最大高度：4.57 mm子类别：Programmable Logic Devices
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL EXTENDED
端子面层：Tin/Lead (Sn85Pb15)端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
宽度：8.9662 mmBase Number Matches：1

GAL16VP8B-15LJ 数据手册

 浏览型号GAL16VP8B-15LJ的Datasheet PDF文件第2页浏览型号GAL16VP8B-15LJ的Datasheet PDF文件第3页浏览型号GAL16VP8B-15LJ的Datasheet PDF文件第4页浏览型号GAL16VP8B-15LJ的Datasheet PDF文件第5页浏览型号GAL16VP8B-15LJ的Datasheet PDF文件第6页浏览型号GAL16VP8B-15LJ的Datasheet PDF文件第7页 
GAL16VP8  
High-Speed E2CMOS PLD  
Generic Array Logic™  
Features  
Functional Block Diagram  
• HIGH DRIVE E2CMOS® GAL® DEVICE  
— TTL Compatible 64 mA Output Drive  
— 15 ns Maximum Propagation Delay  
— Fmax = 80 MHz  
I/CLK  
I
CLK  
— 10 ns Maximum from Clock Input to Data Output  
I/O/Q  
8
8
OLMC  
— UltraMOS® Advanced CMOS Technology  
I
• ENHANCED INPUT AND OUTPUT FEATURES  
— Schmitt Trigger Inputs  
— Programmable Open-Drain or Totem-Pole Outputs  
— Active Pull-Ups on All Inputs and I/O pins  
• E2 CELL TECHNOLOGY  
— Reconfigurable Logic  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
OLMC  
I
8
8
8
I
I
I
I
— Reprogrammable Cells  
— 100% Tested/100% Yields  
— High Speed Electrical Erasure (<100ms)  
— 20 Year Data Retention  
• EIGHT OUTPUT LOGIC MACROCELLS  
— Maximum Flexibility for Complex Logic Designs  
— Programmable Output Polarity  
— Architecturally Compatible with Standard GAL16V8  
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS  
— 100% Functional Testability  
8
8
8
• APPLICATIONS INCLUDE:  
— Ideal for Bus Control & Bus Arbitration Logic  
— Bus Address Decode Logic  
— Memory Address, Data and Control Circuits  
— DMA Control  
I
I
I/O/Q  
I/OE  
• ELECTRONIC SIGNATURE FOR IDENTIFICATION  
OE  
Description  
The GAL16VP8, with 64 mA drive capability and 15 ns maximum  
propagation delay time is ideal for Bus and Memory control appli-  
Pin Configuration  
cations.  
The GAL16VP8 is manufactured using Lattice  
DIP  
Semiconductor's advanced E2CMOS process which combines  
CMOS with Electrically Erasable (E2) floating gate technology. High  
speed erase times (<100ms) allow the devices to be reprogrammed  
quickly and efficiently.  
PLCC  
1
20  
I/CLK  
I
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I
I
I
I/CLK  
I
I/O/Q  
System bus and memory interfaces require control logic before  
driving the bus or memory interface signals. The GAL16VP8  
combines the familiar GAL16V8 architecture with bus drivers as  
its outputs. The generic architecture provides maximum design flex-  
ibility by allowing the Output Logic Macrocell (OLMC) to be con-  
figured by the user. The 64mAoutput drive eliminates the need for  
additional devices to provide bus driving capability.  
I
I
GAL  
2
20  
18  
4
6
I/O/Q  
I
16VP8  
I/O/Q  
I/O/Q  
Vcc  
I
5
Vcc  
GAL16VP8  
Top View  
16  
15  
GND  
I/O/Q  
I/O/Q  
I/O/Q  
I/O/Q  
I
GND  
I/O/Q  
I
I
I
I
Unique test circuitry and reprogrammable cells allow completeAC,  
DC, and functional testing during manufacture. As a result, Lattice  
Semiconductor delivers 100% field programmability and function-  
ality of all GAL products. In addition, 100 erase/write cycles and  
data retention in excess of 20 years are specified.  
14  
8
13  
9
I
11  
I/OE I/O/Q I/O/Q I/O/Q  
I
10  
11  
I/OE  
Copyright © 1997 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject  
to change without notice.  
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.  
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com  
December 1997  
16vp8_03  
1
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中文翻译

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