Datasheet > GA02-PSF

GA02-PSF

更新时间： 2024-11-10 18:43:03

品牌	Logo	应用领域
CONNOR-WINFIELD		/
页数	文件大小	规格书
4页	89K
描述
Phase Locked Loop, CDSO10, CERAMIC, SMT-10

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数据手册

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GA02-PSF 数据手册

THE CONNOR-WINFIELD CORP.

C O N N O R

W I N F I E L D

S E M I C O N D U C T O R

2111 COMPREHENSIVE DRIVE.

AURORA, IL 60505.

FAX (630) 851-5040.

PHONE (630) 851-4722.

HTTP://WWW.CONWIN.COM

GaAs PLL Frequency Multiplier

TECHNICAL DATA

DIP PIN ASSIGNMENT

The GA Series of frequency multipliers comprises a set of

three phase-locked loop integrated circuits to generate high

frequency crystal controlled outputs. All three devices are

implemented using Gallium Arsenide Technology.

Applications include SONET and RF wireless systems

requiring low phase jitter.

GA01 - PT

GA02 - PT

GA03 - PT

To increase the usable output frequency range of the device,

three divide by two prescalars are available. All prescalar

outputs are ECL compatible. External components required

for operation are: (1) loop filter; and (2) reference input.

The external reference can be stable or variable such as a

VCXO.

SM PIN ASSIGNMENT

NQ3

NQ2

GA01 - PS

GA02 - PS

GA03 - PS

Vcc

LOGIC DIAGRAM

Vee

NQ1

REF IN

TUNE

BARE DIE PAD ASSIGNMENT

*- Back side of Die must be biased to Vcc

-------24

GA01 - DG

GA02 - DG

GA03 - DG

-------17

Gnd

Vcc

Reset_in

Vcc

9---------

PAD

CONNECTION

Gnd

PVcc

Nref_out

Vref_in

Ref_in

PVcc

Vcc

Gnd

AGnd

Iout

Tune

Gnd

Q_25

PVcc

Gnd

PVcc

NQ3

PVcc

NQ2

PVcc

ORDERING INFORMATION

An internal passive lag loop filter can be included internal

to the package suffixes PT and PS. Add an additional “F”

to the end of the suffix for internal loop filter option. Loop

filter components values are given in the design example

AN-95 GaAs PLL Application Note. For additional loop

filter options contact the factory.

AVcc

AGnd

NQ1

PVcc

INT

Specifications subject to change without notice.

12 3 4

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