G2998/G2999
Global Mixed-mode Technology
DDR Termination Regulator
low-external component count systems. The G2998/
G2999 maintains a high speed operational amplifier that
provides fast load transient response and only requires
20μF (2 × 10μF) of ceramic output capacitance. The
G2998/G2999 supports remote sensing functions and
all features required to power the DDR I / DDR II / DDR
III / DDR IIIL VTT bus termination according to the
JEDEC specification. In addition, the G2998/ G2999
also has an Enable (EN) pin that provides Suspend to
RAM (STR) functionality. When EN is pulled low, VREF
will remain active, but VTT output will be turned off and
discharged to the ground through internal MOSFETs in
G2998 version and VTT output will be in tri-state in
G2999 version. A power saving advantage can be ob-
tained in this mode through lowering the quiescent cur-
rent to150μA @ VCC=3.3V.
Features
Support and DDR I (1.25VTT), DDR II (0.9 VTT) ,
DDR III (0.75 VTT) , and DDR IIIL (0.675VTT)
Requirements
Input Voltage Range: 3V to 5.5V
VTT_IN Voltage Range: 1.2V to 3.6V
Requires Only 20µF Ceramic Output Capacitance
VTT Pulled Low by 2kΩ Resistor in Stand-By
Mode (G2998 version)
VTT Tri-State in Stand-By Mode
(G2999 version)
Integrated Divider Tracks 1/2 VDDQ for Both
VTT and VREF
Remote Sensing (VTTS)
±20mV Accuracy for VTT
±30mV Accuracy for VREF
Built-In Soft-Start
Over Current Protection
Thermal Shutdown Protection
MSOP-8 and SOP-8(Thermal Pad) Package
The G2998/G2999 is available in the MSOP-8 and
SOP-8 package with the Thermal pad.
Ordering Information
ORDER
NUMBER
G2998P81U
G2998F11U
G2999F11U
TEMP.
RANGE
PACKAGE
(Green)
Applications
MARKING
DDR I/II/III/IIIL Memory Termination
SSTL−2, SSTL−18
G2998
G2998
G2999
-40°C~85°C
-40°C~85°C
-40°C~85°C
MSOP-8
SOP-8 (FD)
SOP-8 (FD)
HSTL Termination
Note: P8: MSOP-8
F1: SOP-8 (FD)
General Description
The G2998/G2999 is a 3A sink/source tracking termi-
nation regulator. It is specifically designed for low-cost/
1: Bonding Code
U: Tape & Reel
Pin Configuration
DDR II
G2998
G2998/G2999
1.8V
VTT_IN
VREF
C2
0.1µF
1
8
7
VTT
1
8
7
VTT
VDDQ
VCC
EN
GND
EN
GND
EN
V
CC=3.3V
EN
VTTS
VTT
2
2
3
4
VTT_IN
VCC
VTT_IN
VCC
Thermal
Pad
3
4
6
6
VTTS
VREF
VTTS
VREF
GND
5
VDDQ
5
VDDQ
C1
2 x 10µF
Top View
MSOP- 8
SOP- 8 (FD)
Note: Recommend connecting the Thermal Pad
to the GND for excellent power dis sipation.
Typical Application Circuit
DDR I
DDR III*
2.5V
1.5V
VTT_IN
VDDQ
VCC
VREF
VTT_IN
VREF
C2
0.1µF
C2
0.1µF
VDDQ
VCC
EN
VCC=3.3V
EN
VTTS
VTT
VCC=3.3V
EN
VTTS
VTT
EN
GND
GND
C1
C1
2 x 10µF
2 x 10µF
* Recommended VCC =3.3V
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.5
Nov 22, 2011
1