Global Mixed-mode Technology Inc.
G2992
3A DDR Bus Termination Regulator
Features
General Description
VCNTL Supply Voltage: 3.3V to 5.5V
Termination Supply Voltage: 1.8V to 3.6V
Support Both DDR I(1.25V ) and DDR II (0.9
The G2992 is a linear regulator designed to meet the
JEDEC SSTL-18, SSTL-2 and SSTL-3 (Series Stub
Termination Logic) specifications for termination of
DDR I / II -SDRAM. It contains a high-speed opera-
tional amplifier that provides excellent response to the
load transients. This device can deliver 3A continuous
current in the application such as required for DDR I/ II
SDRAM termination. The G2992 can easily provide
TT
V ) Requirements
TT
Requires Only 20µF Ceramic Output Capacitor
Low Output Offset
3A Source and Sink Current
Low External Component Count
No Inductor Required
Thermal Shutdown Protection
Over Current Protection
Suspend to RAM (STR) Function with
High-impedance output
the accurate V
voltage with two external resistors
TT
generating reference voltage. The quiescent current is
as low as 750µA @ V = 3.3V. So the power con-
CNTL
sumption can meet the low power consumption appli-
cations. The G2992 also has a shutdown function by
SOP-8 (FD) Package
setting V
smaller than 0.2V, that provides Suspend
REF
to RAM (STR) functionality. When in the shutdown
mode, the V output (on V pin) will be tri-state
providing a high impendence. A power saving advan-
tage can be obtained in this mode through lowering
Applications
TT
OUT
DDR-SDRAM Termination Voltage
DDR I / DDR II Termination Voltage
SSTL-18
SSTL-2
SSTL-3
the quiescent current to 50μA @ V
= 3.3V.
CNTL
Ordering Information
ORDER
NUMBER
G2992F1U
TEMP.
RANGE
PACKAGE
(Pb free)
MARKING
G2992
-40°C to +85°C SOP-8 (FD)
Note: U: Tape & Reel
(FD): Thermal Pad
Pin Configuration
Typical Application Circuit
VCNTL=3.3V
VIN=2.5V
G2992
RTT
8
7
6
5
1
2
3
4
VIN
NC
R1
R2
CIN
CCNTL
VIN VCNTL
VREF
GND
NC
VOUT
GND
VCNTL
2N7002
EN
VREF
VOUT
COUT
CSS
RDUMMY
NC
SOP-8(FD)
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.0
Aug 29, 2006
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