Datasheet > G2987

G2987

更新时间： 2024-09-26 01:25:31

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描述
DDR Termination Regulator

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G2987 数据手册

G2987

Global Mixed-mode Technology

DDR Termination Regulator

Features

General Description

Support DDR I (1.25 VTT), DDR II (0.9 VTT),

The G2987 is a linear regulator designed to meet the

JEDEC SSTL (Series Stub Termination Logic) speci-

fications in DDRI/II/III/IIIL/IV –SDRAM systems. It pro-

vides accurate and fast response with up to 1.8A

source/sink ability in load transient to track reference

voltage. The terminated voltage can be generated by

two external resistors or programmed by forcing VREF

pin at a desired voltage. Also the G2987 operate in

low power consumption as low as 0.7mA and it has a

shutdown function by setting VREF lower than 0.15V

then the VTT is turned off and discharged via an in-

ternal MOSFET. This function obtains low quiescent

current as 50μA for STR mode.

DDR III (0.75 VTT), DDR IIIL (0.675VTT) and

DDR IV (0.6 V^TT) Requirements

VCNTL Supply Voltage: 3V to 5.5V

Termination Supply Voltage : 1.2V to 3.6V

Stable with Output Ceramic Capacitor

Over Current Protection

Thermal Shutdown Protection

Shutdown Function for STR (S3) Mode

Adjustable Output Voltage with Resistors

Built-In Soft-Start

Power MOS integrated

SOP-8 (FD) and MSOP-8 (FD) Package

RoHS Compliant

Applications

Ordering Information

DDR I/II/III/IIIL/IV Memory Termination

SSTL_3, SSTL_2, SSTL_18, SSTL_15

Notebook/Desktop/Server

ORDER

NUMBER

G2987F11U

G2987F51U

TEMP.

RANGE

PACKAGE

(Green)

MARKING

Telecom/Datacom, GSM Base Station,

LCD-TV/PDP-TV, Copier/Printer, Set-Top Box

G2987

-40°C~85°C

SOP-8 (FD)

MSOP-8 (FD)

Note: F1: SOP-8 (FD) F5: MSOP-8 (FD)

1: Bonding Code

U : Tape & Reel

Pin Configuration

G2987

DDR II

V_CNTL=3.3V

VIN

_IN=1.8V

R_TT

GND

R₁

R₂

C_IN

C_CNTL

Thermal

Pad

VIN VCNTL

VREF

VCNTL

VREF

VOUT

V_TT

VOUT

2N7002

C_OUT

C_SS

R_DUMMY

GND

SOP-8 (FD)/MSOP-8 (FD)

Note: Recommend connecting the Thermal Pad to

the Ground for excellent power dissipation.

Typical Application Circuit

DDR III*

DDR I

V_CNTL=3.3V

_IN=1.5V

_IN=2.5V

R_TT

C_IN

R₁

R₂

C_IN

C_CNTL

R₁

R₂

C_CNTL

VIN VCNTL

VREF

VOUT

GND

VIN VCNTL

VREF

VOUT

C_SS

GND

V_TT

2N7002

C_OUT

C_SS

R_DUMMY

* Recommended V_CTRL=3.3V

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver: 0.4

Jan 16, 2013

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