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FSTUD16211GX PDF预览

FSTUD16211GX

更新时间: 2024-11-12 22:17:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器开关逻辑集成电路
页数 文件大小 规格书
8页 303K
描述
24-Bit Bus Switch with -2V Undershoot Protection and Level Shifting

FSTUD16211GX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:LFBGA, BGA54,6X9,32
针数:54Reach Compliance Code:compliant
风险等级:5.56Is Samacsys:N
其他特性:TTL COMPATIBLE BUS SWITCH系列:CBT/FST/QS/5C/B
JESD-30 代码:R-PBGA-B54JESD-609代码:e0
长度:8 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:3位数:12
功能数量:2端口数量:2
端子数量:54最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装等效代码:BGA54,6X9,32
封装形状:RECTANGULAR封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:5 V
传播延迟(tpd):0.25 ns认证状态:Not Qualified
座面最大高度:1.4 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.5 mm
Base Number Matches:1

FSTUD16211GX 数据手册

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June 2000  
Revised August 2001  
FSTUD16211  
24-Bit Bus Switch with 2V Undershoot Protection  
and Level Shifting  
General Description  
Features  
Undershoot hardened to 2V (A and B Ports)  
The Fairchild Switch FSTUD16211 provides 24-bits of  
high-speed CMOS TTL-compatible bus switching. The low  
on resistance of the switch allows inputs to be connected to  
outputs without adding propagation delay or generating  
additional ground bounce noise. A diode to VCC has been  
Voltage level shifting  
4switch connection between two ports  
Minimal propagation delay through the switch  
Low lCC  
integrated into the circuit to allow for level shifting between  
5V inputs and 3.3V outputs.  
Zero bounce in flow-through mode  
The device is organized as a 12-bit or 24-bit bus switch.  
When OE1 is LOW, the switch is ON and Port 1A is con-  
Control inputs compatible with TTL level  
See Applications Note AN-5008 for details  
nected to Port 1B. When OE2 is LOW, Port 2A is connected  
to Port 2B. When OE1/2 is HIGH, a high impedance state  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA) (Preliminary)  
exists between the A and B Ports. The A and B Ports have  
“undershoot hardened” circuit protection to support an  
extended range to 2.0V below ground. Fairchild’s inte-  
grated Undershoot Hardened Circuit (UHC  
) senses  
undershoot at the I/O’s, and responds by preventing volt-  
age differentials from developing and turning on the switch.  
Ordering Code:  
Order Number  
Package Number  
Package Description  
FSTUD16211GX  
(Note 1)  
BGA54A  
(Preliminary)  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[TAPE and REEL]  
FSTUD16211MTD  
MTD56  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Note 1: BGA package available in Tape and Reel only.  
Logic Diagram  
UHC is a trademark of Fairchild Semiconductor Corporation.  
© 2001 Fairchild Semiconductor Corporation  
DS500390  
www.fairchildsemi.com  

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