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33932

更新时间： 2022-09-18 16:11:53

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		/
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21页	1240K
描述
5.0 A Throttle Control H-Bridge

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33932 数据手册

Document Number: MC33932

Rev. 3.0, 1/2009

Freescale Semiconductor

Advance Information

5.0 A Throttle Control H-Bridge

33932

The 33932 is a monolithic H-Bridge Power IC in a robust thermally

enhanced package. The 33932 has two independent monolithic H-

Bridge Power ICs in the same package. They are designed primarily for

automotive electronic throttle control, but are applicable to any low-

voltage DC servo motor control application within the current and

voltage limits stated in this specification.

THROTTLE CONTROL H-BRIDGE

Each H-bridge in the 33932 is able to control inductive loads with

currents up to 5.0 A peak. RMS current capability is subject to the

degree of heatsinking provided to the device package. Internal peak-

current limiting (regulation) is activated at load currents above 6.5 A

±1.5 A. Output loads can be pulse width modulated (PWM-ed) at

frequencies up to 11 kHz. A load current feedback feature provides a

proportional (0.24% of the load current) current output suitable for

monitoring by a microcontroller’s A/D input. A Status Flag output

reports under-voltage, over-current, and over-temperature fault

conditions.

VW SUFFIX (PB-FREE)

98ARH98330A

44-PIN HSOP

WITH PROTRUDING HEAT SINK

Two independent inputs provide polarity control of two half-bridge

totem-pole outputs. Two independent disable inputs are provided to

force the H-bridge outputs to tri-state (high-impedance off-state).

ORDERING INFORMATION

Temperature

Device

Package

Range (T )

Features

MC33932VW/R2

-40°C to 125°C

44 HSOP

• 8.0 to 28 V continuous operation (transient operation from 5.0 to

40 V)

• 235 mΩ maximum R_DS(ON)@ 150°C (each H-Bridge MOSFET)

• 3.0 V and 5.0 V TTL / CMOS logic compatible inputs

• Over-current limiting (regulation) via internal constant-off-time PWM

• Output short-circuit protection (short to VPWR or GND)

• Temperature-dependant current-limit threshold reduction

• All inputs have an internal source/sink to define the default (floating input) states

• Sleep Mode with current draw < 50 µA (each half with inputs floating or set to match default logic states)

PWR

33932

SFA

FBA

IN1

VPWRA

CCPA

OUT1

IN2

EN/D2

MOTOR

PWR

OUT2

PGNDA

AGNDA

MCU

IN3

IN4

EN/D4

VPWRB

CCPB

OUT3

FBB

SFB

MOTOR

PGNDB

AGNDB

OUT4

Figure 1. MC33932 Simplified Application Diagram

* This document contains certain information on a new product.

Specifications and information herein are subject to change without notice.

12 3 4 5 6 7...21

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