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33884

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 显示器
页数 文件大小 规格书
21页 700K
描述
Switch Monitor Interface

33884 数据手册

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Document Number: MC33884  
Rev. 4.0, 11/2006  
Freescale Semiconductor  
Technical Data  
Switch Monitor Interface  
The 33884 Switch Monitor Interface is a monolithic silicon integrated  
circuit (IC) to perform switch monitoring functions. The device provides  
efficient interface between electrical switches and low voltage  
microprocessors. The 33884 supplies switch contact pull-up and pull  
down current while monitoring the input voltage level. All inputs are  
protected for transients when implemented with an appropriate static  
discharge capacitor used on the inputs.  
33884  
SWITCH MONITOR INTERFACE  
There are four modes of operation: Sleep, Normal, Polling, and  
Polling + INT Timer.  
The Polling and Timer modes are similar, except the Timer mode  
has the addition of an interrupt that is sent to the microprocessor if a  
switch is sensed closed, or upon the internal interrupt timer times out.  
An interrupt is ultimately sent to the microprocessor. All modes of  
operation are easily programmed via the Serial Peripheral Interface  
(SPI) control.  
DW SUFFIX  
EG (PB-FREE) SUFFIX  
98ASB42344B  
24-PIN SOICW  
Features  
• Full Operation with 7.0 V < VPWR < 26 V, Limited Operation with  
5.5 V < VPWR < 7.0 V  
• Input Voltage Range: -14 V to 40 V  
• Interface Directly to Microprocessors Using SPI Protocol  
• Wake Up on Change of Monitored Switch Status  
• Programmable Wetting Current  
ORDERING INFORMATION  
Temperature  
Device  
Package  
Range (T )  
A
MC33884DW/R2  
MCZ33884EG/R2  
-40°C to 105°C  
24 SOICW  
• Four Switch-to-Ground Switches  
• Six (Fixed Function) Inputs Monitoring Six Switch-to-Ground  
Switches  
• Two (Fixed Function) Inputs Monitoring Two Switch-to-Battery Switches  
• Quiescent Current in Sleep Mode < 10 µA  
• Reset Input Defaults the Device to Sleep Mode  
• Pb-Free Packaging Designated by Suffix Code EG  
V
PWR  
V
33884  
DD  
VPWR  
VDD  
MCU  
VDD  
SB1  
SB2  
2 V  
Sense Inputs  
PWR  
CS  
CS  
SI  
SP1  
SP2  
SP3  
SP4  
MOSI  
MISO  
CLK  
SO  
SCLK  
INT  
4 GND / V  
PWR  
INT  
Sense Inputs  
RESET  
GND  
VBG  
RESET  
GND  
SG1  
SG2  
SG3  
SG4  
SG5  
SG6  
SYNC  
MASL  
6 GND  
Sense Inputs  
Figure 1. 33884 Simplified Application Diagram  
Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as  
may be required, to permit improvements in the design of its products.  
© Freescale Semiconductor, Inc., 2006. All rights reserved.  

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