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FQI3P50 PDF预览

FQI3P50

更新时间: 2024-11-05 22:14:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 648K
描述
500V P-Channel MOSFET

FQI3P50 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TO-262包装说明:IN-LINE, R-PSIP-T3
针数:3Reach Compliance Code:unknown
风险等级:5.76雪崩能效等级(Eas):250 mJ
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:500 V
最大漏极电流 (Abs) (ID):2.7 A最大漏极电流 (ID):2.7 A
最大漏源导通电阻:4.9 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码:TO-262AAJESD-30 代码:R-PSIP-T3
JESD-609代码:e0元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:P-CHANNEL
最大功率耗散 (Abs):85 W最大脉冲漏极电流 (IDM):10.8 A
认证状态:Not Qualified子类别:Other Transistors
表面贴装:NO端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

FQI3P50 数据手册

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August 2000  
TM  
QFET  
FQB3P50 / FQI3P50  
500V P-Channel MOSFET  
General Description  
These P-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for electronic lamp ballast based on complimentary  
half bridge.  
Features  
-2.7A, -500V, R  
= 4.9@V = -10 V  
DS(on) GS  
Low gate charge ( typical 18 nC)  
Low Crss ( typical 9.5 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
S
!
D
G!  
G
S
D2-PAK  
FQB Series  
I2-PAK  
FQI Series  
G
D
S
!
D
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB3P50 / FQI3P50  
Units  
V
V
I
Drain-Source Voltage  
-500  
-2.7  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
-1.71  
-10.8  
± 30  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
A
DM  
V
E
I
Gate-Source Voltage  
V
GSS  
AS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
250  
mJ  
A
-2.7  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
8.5  
mJ  
V/ns  
W
AR  
dv/dt  
-4.5  
Power Dissipation (T = 25°C) *  
3.13  
P
A
D
Power Dissipation (T = 25°C)  
85  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
0.68  
W/°C  
°C  
T , T  
-55 to +150  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
1.47  
40  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2000 Fairchild Semiconductor International  
Rev. A, August 2000  

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