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FQB13N50C_08 PDF预览

FQB13N50C_08

更新时间: 2024-11-01 12:23:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 973K
描述
500V N-Channel MOSFET

FQB13N50C_08 数据手册

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October 2008  
QFET®  
FQB13N50C/FQI13N50C  
500V N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for high efficiency switched mode power supplies,  
active power factor correction, electronic lamp ballasts  
based on half bridge topology.  
13A, 500V, R  
= 0.48@V = 10 V  
DS(on) GS  
Low gate charge ( typical 43nC)  
Low Crss ( typical 20pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
RoHS Compliant  
D
!
D
"
! "  
"
"
!
G
I2-PAK  
D2-PAK  
FQB Series  
G
S
FQI Series  
!
S
G D S  
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB13N50C / FQI13N50C  
Units  
V
V
I
Drain-Source Voltage  
500  
13  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
8
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
52  
A
DM  
V
E
I
Gate-Source Voltage  
± 30  
860  
V
GSS  
AS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
13  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
19.5  
4.5  
mJ  
V/ns  
W
AR  
dv/dt  
P
Power Dissipation (T = 25°C)  
195  
D
C
- Derate above 25°C  
Operating and Storage Temperature Range  
1.56  
-55 to +150  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
0.64  
40  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
--  
62.5  
* When mounted on the minium pad size recommended (PCB Mount).  
©2008 Fairchild Semiconductor Corporation  
Rev. A1, October 2008  

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