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FQB13N50 PDF预览

FQB13N50

更新时间: 2024-10-31 22:14:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 626K
描述
500V N-Channel MOSFET

FQB13N50 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:D2PAK-3针数:3
Reach Compliance Code:compliant风险等级:5.8
雪崩能效等级(Eas):810 mJ外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:500 V
最大漏极电流 (Abs) (ID):12.5 A最大漏极电流 (ID):12.5 A
最大漏源导通电阻:0.43 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PSSO-G2JESD-609代码:e0
元件数量:1端子数量:2
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):170 W
最大脉冲漏极电流 (IDM):50 A认证状态:Not Qualified
子类别:FET General Purpose Power表面贴装:YES
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

FQB13N50 数据手册

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March 2001  
TM  
QFET  
FQB13N50 / FQI13N50  
500V N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
12.5A, 500V. R  
= 0.43@V = 10 V  
DS(on) GS  
Low gate charge ( typical 45 nC).  
Low Crss ( typical 25 pF).  
Fast switching.  
100% avalanche tested.  
Improved dv/dt capability.  
This advanced technology is especially tailored to minimize  
on-state  
resistance,  
provide  
superior  
switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for high efficiency switch mode power supply, power  
factor correction, and electronic lamp ballast based on half  
bridge.  
D
!
D
G!  
G
S
D2-PAK  
FQB Series  
I2-PAK  
FQI Series  
G
D
S
!
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB13N50 / FQI13N50  
Units  
V
V
I
Drain-Source Voltage  
500  
12.5  
7.9  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
50  
A
DM  
V
E
I
Gate-Source Voltage  
± 30  
810  
V
GSS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
AS  
12.5  
17  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
mJ  
V/ns  
W
AR  
dv/dt  
4.5  
Power Dissipation (T = 25°C) *  
3.13  
170  
P
A
D
Power Dissipation (T = 25°C)  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
1.35  
-55 to +150  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
0.74  
40  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2001 Fairchild Semiconductor Corporation  
Rev. A, March 2001  

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