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FOD3180TSV PDF预览

FOD3180TSV

更新时间: 2024-09-24 19:56:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 输出元件光电
页数 文件大小 规格书
13页 392K
描述
FET Output Optocoupler

FOD3180TSV 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:DIP
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8541.40.80.00
风险等级:8.49JESD-609代码:e3
光电设备类型:FET OUTPUT OPTOCOUPLER端子面层:Matte Tin (Sn)
Base Number Matches:1

FOD3180TSV 数据手册

 浏览型号FOD3180TSV的Datasheet PDF文件第2页浏览型号FOD3180TSV的Datasheet PDF文件第3页浏览型号FOD3180TSV的Datasheet PDF文件第4页浏览型号FOD3180TSV的Datasheet PDF文件第5页浏览型号FOD3180TSV的Datasheet PDF文件第6页浏览型号FOD3180TSV的Datasheet PDF文件第7页 
August 2008  
FOD3180  
2A Output Current, High Speed MOSFET Gate Driver  
Optocoupler  
Features  
Description  
Guaranteed operating temperature range of -40°C to  
+100°C  
2A minimum peak output current  
High speed response: 200ns max propagation delay  
over temperature range  
The FOD3180 is a 2A Output Current, High Speed  
MOSFET Gate Drive Optocoupler. It consists of a  
aluminium gallium arsenide (AlGaAs) light emitting diode  
optically coupled to a CMOS detector with PMOS and  
NMOS output power transistors integrated circuit power  
stage. It is ideally suited for high frequency driving of  
power MOSFETs used in Plasma Display Panels  
(PDPs), motor control inverter applications and high  
performance DC/DC converters.  
250kHz maximum switching speed  
30ns typ pulse width distortion  
Wide V operating range: 10V to 20V  
CC  
5000Vrms, 1 minute isolation  
Under voltage lockout protection (UVLO) with  
hysteresis  
Minimum creepage distance of 7.0mm  
Minimum clearance distance of 7.0mm  
C-UL, UL and VDE* approved  
The device is packaged in an 8-pin dual in-line housing  
compatible with 260°C reflow processes for lead free  
solder compliance.  
R  
of 1.5(typ.) offers lower power dissipation  
DS(ON)  
15kV/µs minimum common mode rejection  
Applications  
Plasma Display Panel  
High performance DC/DC convertor  
High performance switch mode power supply  
High performance uninterruptible power supply  
Isolated Power MOSFET gate drive  
*Requires ‘V’ ordering option  
Functional Block Diagram  
Package Outlines  
FOD3180  
1
2
3
4
8
7
NO CONNECTION  
ANODE  
VCC  
8
1
OUTPUT  
CATHODE  
6 OUTPUT  
5 VEE  
NO CONNECTION  
8
8
1
1
Note:  
A 0.1µF bypass capacitor must be connected between pins 5 and 8.  
©2005 Fairchild Semiconductor Corporation  
FOD3180 Rev. 1.0.6  
www.fairchildsemi.com  

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