Datasheet > FMS9874

FMS9874

更新时间： 2024-11-19 21:53:19

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		转换器
页数	文件大小	规格书
25页	173K
描述
Graphics Digitizer - 3x8-Bit, 108Ms/s Triple Video A/D Converter with Clamps

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FMS9874 数据手册

www.fairchildsemi.com

FMS9874

Graphics Digitizer

3x8-Bit, 108Ms/s Triple Video A/D Converter with Clamps

1600 x 1200/75Hz. ADC sampling clock can be derived from

Features

• 3-channels

either an external source or incoming horizontal sync signal

using the internal PLL. Output data is 24-bit RGB. Setup and

control is via registers, accessible through an SMBus/I²C com-

patible serial port.

• 108 Ms/s conversion rate

• Programmable Clamps

• 500ps PLL clock jitter

• Adjustable Gain and offset

• Internal Reference Voltage

• I²C/SMBus compatible Serial Port

• 100-pin package

Input amplitude range is 500–1000mV with either DC or AC

coupling. Lower reference of AC coupled inputs is estab-

lished with input clamps that are either internally generated

or externally provided.

Common to the three channels are clamp pulses, a bandgap

reference voltage and clocks derived from a PLL or an external

source. Digital data levels are 2.5–3.3 volt CMOS compliant.

Applications

• Flat panel displays and projectors

• RGB Graphics Processing

Power can be derived from a single +3.3 Volt power supply.

Package is a 100-lead MQFP. Performance speciﬁcations are

guaranteed over 0°C to 70°C range.

Description

As a fully integrated analog interface, the FMS9874 can directly

digitize RGB graphics with resolutions up to 1024 x 768/85Hz

and 1280 x 1024/60Hz; or using alternate pixel sampling,

Block Diagram

A/D

Converter

Gain &

Offset

DR_7-0

Clamp

R_IN

Gain &

Offset

A/D

Converter

Clamp

DG_7-0

G_IN

Gain &

Offset

A/D

Converter

B_IN

DB_7-0

Reference

VREFIN

VREFOUT

SCK

CLAMP

INVSCK

XCK

ICLAMP

Timing

Generator

PXCK

DCK

HSOUT

HSIN

COAST

LPF

PLL

SDA

SCL

A₀

A₁

SYNC

STRIPPER

ACS_IN

Control

DCS_OUT

PWRDN

REV. 1.5 11/10/00

12 3 4 5 6 7...25

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