http://www.fujielectric.com/products/semiconductor/
FUJI POWER MOSFET
FMP30N60S1
Super J MOS® S1 series
Features
N-Channel enhancement mode power MOSFET
Outline Drawings [mm]
Equivalent circuit schematic
Pb-free lead terminal
RoHS compliant
TO-220
10+00.5
4.5±0.2
1.3±0.2
②Drain
Applications
For switching
1.2 ±0.2
①
Gate
PRE-SOLDER
①
②
③
1
2
3
0.4 +0.2
0
+0.2
-0.1
0.8
2.7±0.2
③Source
2.54±0.2
2.54± 0.2
CONNECTION
1
2
3
GATE
DRAIN
SOURCE
JEDEC : TO-220AB
2
3
1
DIMENSIONS ARE IN MILLIMETERS.
Absolute Maximum Ratings at T =25°C (unless otherwise specified)
C
Description
Symbol
Characteristics
Unit
Remarks
V
V
DS
600
600
V
V
Drain-Source Voltage
DSX
VGS=-30V
±30
A
Tc=25°C Note*1
Tc=100°C Note*1
Continuous Drain Current
ID
±19
A
Pulsed Drain Current
I
DP
±90
A
Gate-Source Voltage
V
GS
±30
V
Repetitive and Non-Repetitive Maximum Avalanche Current
Non-Repetitive Maximum Avalanche Energy
Maximum Drain-Source dV/dt
I
AR
6.6
A
Note *2
Note *3
E
AS
849.2
50
mJ
kV/μs
kV/μs
A/μs
dVDS/dt
dV/dt
-di/dt
VDS≤ 600V
Peak Diode Recovery dV/dt
12
Note *4
Note *5
Peak Diode Recovery -di/dt
100
2.02
250
T
a
=25°C
Maximum Power Dissipation
P
D
W
Tc=25°C
T
ch
150
°C
°C
Operating and Storage Temperature range
T
stg
-55 to +150
Note *1 : Limited by maximum channel temperature.
Note *2 : Tch≤150°C, See Fig.1 and Fig.2
Note *3 : Starting Tch=25°C, IAS=4A, L=97.3mH, VDD=60V, R
AS limited by maximum channel temperature and avalanche current.
≤-I , -di/dt=100A/μs, VDD≤400V, Tch≤150°C.
≤-I , dV/dt=12kV/μs, VDD≤400V, Tch≤150°C.
G
=50Ω, See Fig.1 and Fig.2
E
Note *4 : I
F
D
Note *5 : I
F
D
Electrical Characteristics at T =25°C (unless otherwise specified)
C
• Static Ratings
Description
Symbol
Conditions
min.
typ.
max.
Unit
I
V
D
=250μA
GS=0V
Drain-Source Breakdown Voltage
Gate Threshold Voltage
BVDSS
600
-
3.0
-
-
V
ID
=250μA
DS=VGS
V
GS(th)
2.5
3.5
25
V
V
V
V
DS=600V
GS=0V
T
ch=25°C
-
-
-
Zero Gate Voltage Drain Current
Gate-Source Leakage Current
I
DSS
μA
nA
V
V
DS=480V
GS=0V
Tch=125°C
-
250
100
V
V
GS= ±30V
DS=0V
IGSS
10
I
V
D
=15A
GS=10V
Drain-Source On-State Resistance
Gate resistance
R
DS(on)
G
-
-
0.106
3.2
0.125
-
Ω
Ω
R
f=1MHz, open drain
07945a
OCTOBER 2015
1