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FM93C56LZN PDF预览

FM93C56LZN

更新时间: 2024-10-31 22:48:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
16页 172K
描述
(MICROWIRE⑩ Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read

FM93C56LZN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP8,.3
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.67Is Samacsys:N
最大时钟频率 (fCLK):0.25 MHz数据保留时间-最小值:40
耐久性:1000000 Write/Erase CyclesJESD-30 代码:R-PDIP-T8
JESD-609代码:e0长度:9.817 mm
内存密度:2048 bit内存集成电路类型:EEPROM
内存宽度:16功能数量:1
端子数量:8字数:128 words
字数代码:128工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128X16封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP8,.3
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:SERIAL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3/5 V认证状态:Not Qualified
座面最大高度:5.08 mm串行总线类型:MICROWIRE
最大待机电流:0.000001 A子类别:EEPROMs
最大压摆率:0.001 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mm最长写入周期时间 (tWC):15 ms
写保护:SOFTWAREBase Number Matches:1

FM93C56LZN 数据手册

 浏览型号FM93C56LZN的Datasheet PDF文件第2页浏览型号FM93C56LZN的Datasheet PDF文件第3页浏览型号FM93C56LZN的Datasheet PDF文件第4页浏览型号FM93C56LZN的Datasheet PDF文件第5页浏览型号FM93C56LZN的Datasheet PDF文件第6页浏览型号FM93C56LZN的Datasheet PDF文件第7页 
July 2000  
FM93CS56  
(MICROWIRE™ Bus Interface) 2048-Bit Serial EEPROM  
with Data Protect and Sequential Read  
General Description  
Features  
FM93CS56 is a 2048-bit CMOS non-volatile EEPROM organized  
as 128 x 16-bit array. This device features MICROWIRE interface  
which is a 4-wire serial bus with chipselect (CS), clock (SK), data  
input (DI) and data output (DO) signals. This interface is compat-  
ible to many of standard Microcontrollers and Microprocessors.  
FM93CS56 offers programmable write protection to the memory  
array using a special register called Protect Register. Selected  
memory locations can be protected against write by programming  
this Protect Register with the address of the first memory location  
to be protected (all locations greater than or equal to this first  
addressarethenprotectedfromfurtherchange). Additionally, this  
address can be “permanently locked” into the device, making all  
future attempts to change data impossible. In addition this device  
features “sequential read”, by which, entire memory can be read  
in one cycle instead of multiple single byte read cycles. There are  
10 instructions implemented on the FM93CS56, 5 of which are for  
memory operations and the remaining 5 are for Protect Register  
operations. This device is fabricated using Fairchild Semiconduc-  
torfloating-gateCMOSprocessforhighreliability,highendurance  
and low power consumption.  
I Wide VCC 2.7V - 5.5V  
I Programmable write protection  
I Sequential register read  
I Typical active current of 200µA  
10µA standby current typical  
1µA standby current typical (L)  
0.1µA standby current typical (LZ)  
I No Erase instruction required before Write instruction  
I Self timed write cycle  
I Device status during programming cycles  
I 40 year data retention  
I Endurance: 1,000,000 data changes  
I Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP  
“LZ” and “L” versions of FM93CS56 offer very low standby current  
makingthemsuitableforlowpowerapplications.Thisdeviceisoffered  
in both SO and TSSOP packages for small space considerations.  
Functional Diagram  
VCC  
CS  
SK  
INSTRUCTION  
DECODER  
CONTROL LOGIC  
AND CLOCK  
PRE  
PE  
INSTRUCTION  
REGISTER  
DI  
GENERATORS  
COMPARATOR  
AND  
WRITE ENABLE  
HIGH VOLTAGE  
GENERATOR  
AND  
PROGRAM  
TIMER  
ADDRESS  
REGISTER  
PROTECT  
REGISTER  
DECODER  
EEPROM ARRAY  
16  
READ/WRITE AMPS  
16  
VSS  
DATA IN/OUT REGISTER  
16 BITS  
DO  
DATA OUT BUFFER  
1
© 2000 Fairchild Semiconductor International  
FM93CS56 Rev. C.1  
www.fairchildsemi.com  

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