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FM30C256-S PDF预览

FM30C256-S

更新时间： 2024-11-10 22:31:59
品牌 Logo 应用领域
其他 - ETC 内存集成电路光电二极管
页数 文件大小 规格书
18页 261K
描述
256Kb Data Collector

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中文翻译

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FM30C256-S 数据手册

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FM30C256  
256Kb Data Collector  
Features  
Real-time Clock/Calendar  
256K bit Ferroelectric Nonvolatile RAM  
•
•
•
•
•
Backup Current under 1 µA  
•
•
•
•
•
Organized as 32,768 x 8 bits  
High Endurance 10 Billion (1010) Read/Writes  
10 year Data Retention  
Tracks Seconds through Centuries (BCD format)  
Tracks Leap Years through 2099  
Uses Standard 32.768 kHz Crystal (6pF)  
Software Calibration  
NoDelay™ Writes  
Advanced High-Reliability Ferroelectric Process  
System Supervisor  
Fast Two-wire Serial Interface  
•
•
Active-low Reset Output for VDD Out-of-Tolerance  
Tamper Detect Input with Battery Backup and  
Time Stamp  
•
•
•
Up to 1 MHz Maximum Bus Frequency  
Supports Legacy Timing for 100 kHz & 400 kHz  
Clock Registers Accessed via 2-wire Interface  
Description  
Pin Configuration  
The FM30C256 is a 256-kilobit data collection  
subsystem including nonvolatile RAM, timekeeping,  
CPU supervisor, and system tamper detection. Non-  
volatile RAM is provided by FRAM technology,  
which is ideal for collection data and requires no  
battery backup for nonvolatile storage. In other  
respects, it provides the same features as SRAM.  
FRAM performs write operations at bus speed with  
no write delays. Write cycles can be continuous  
without block limitations. In addition, it offers much  
higher write endurance than other nonvolatile  
memories. The FM30C256 supports up to 1010  
read/write cycles.  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VDD  
SCL  
SDA  
NC  
NC  
NC  
NC  
X2  
X1  
VBAK  
TIN  
A0  
A1  
3
4
A2  
5
NC  
NC  
NC  
CAL  
6
7
8
9
RST  
VSS  
10  
The FM30C256 also includes timekeeping with  
external battery backup. The timekeeper consists of  
registers that represent time and date information in  
BCD format. The clock includes a calibration mode  
that allows a software adjustment for timekeeping  
accuracy.  
Pin Names  
TIN  
Function  
Tamper Detect input  
Device Select inputs  
Clock Calibration output  
Reset Output  
A0-A2  
CAL  
/RST  
To maintain system data integrity, the FM30C256  
provides a reset signal asserted when VDD is out of  
tolerance. /RST remains active for 100 ms after VDD  
returns to proper levels. The FM30C256 also  
provides a battery-backed tamper detect circuit that  
records a rising edge on the TIN input. A battery-  
backed flag is set when the event occurs, but can only  
be cleared by software.  
X1, X2  
SDA  
Crystal Connections  
Serial Data  
SCL  
Serial Clock  
VDD  
Supply Voltage 5V  
Battery-Backup input  
Ground  
VBAK  
VSS  
The FM30C256 is provided in a 20-pin SOIC  
package and is guaranteed over an industrial  
temperature range of –40°C to +85°C.  
Ordering Information  
FM30C256-S  
20-pin SOIC  
This product conforms to specifications per the terms of the Ramtron  
standard warranty. Production processing does not necessarily in-  
clude testing of all parameters.  
Ramtron International Corporation  
1850 Ramtron Drive, Colorado Springs, CO 80921  
(800) 545-FRAM, (719) 481-7000, Fax (719) 481-7058  
www.ramtron.com  
Rev 2.1  
Dec. 2002  
Page 1 of 18  
1234567...18

中文翻译

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