September 2002
FM24C32U – 32K-Bit Standard 2-Wire Bus
Interface Serial EEPROM
General Description
Features
FM24C32U is a 32Kbit CMOS non-volatile serial EEPROM orga-
nized as 4K x 8 bit memory. This device confirms to Extended IIC
2-wire protocol that allows accessing of memory in excess of
16Kbit on an IIC bus. This serial communication protocol uses a
Clock signal (SCL) and a Data signal (SDA) to synchronously
clock data between a master (e.g. a microcontroller) and a slave
(EEPROM). FM24C32U is designed to minimize pin count and
simplify PC board layout requirements.
I Extended operating voltage: 2.7V to 5.5V
I Up to 400 KHz clock frequency at 2.7V to 5.5V
I Low power consumption
—0.2mA active current typical
—10µA standby current typical
—1µA standby current typical (L version)
—0.1µA standby current typical (LZ version)
I Schmitt trigger inputs
FM24C32U offers hardware write protection where by the upper
half (upper 16Kbit) of the memory array can be write protected by
connecting WP pin to VCC. This section of memory then becomes
I 32 byte page write mode
I Self timed write cycle (6ms typical)
I Hardware Write Protection for upper half of the array
unalterable until the WP pin is switched to VSS
.
I Low VCC programming lockout for VCC = 5V 10% (“H” option)
—Internal ERASE/WRITE logic is disabled if VCC is below 3.8V
“LZ” and “L” versions of FM24C32U offer very low standby current
making them suitable for low power applications. This device is
offered in both SO and DIP packages.
I Endurance: 1 Million data changes
I Data Retention: Greater than 40 years
I Packages: 8-Pin DIP and 8-Pin SO
Fairchild EEPROMs are designed and tested for applications
requiringhighendurance, highreliabilityandlowpowerconsump-
tion.
I Temperature range
—Commercial: 0°C to +70°C
—Industrial (V): -40°C to +85°C
—Automotive (E): -40°C to +125°C
Block Diagram
V
SS
WRITE
LOCKOUT
V
CC
H.V. GENERATION
TIMING &CONTROL
WP
START
STOP
SDA
LOGIC
CONTROL
LOGIC
SLAVE ADDRESS
REGISTER &
COMPARATOR
2
E
PROM
ARRAY
XDEC
SCL
A2
A1
A0
WORD
ADDRESS
COUNTER
R/W
YDEC
CK
D
OUT
DATA REGISTER
D
IN
1
© 2001 Fairchild Semiconductor Corporation
FM24C32U Rev. A.1
www.fairchildsemi.com