January 2002
Revised February 2002
FIN1102
LVDS 2 Port High Speed Repeater
General Description
Features
This 2 port repeater is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The FIN1102 accepts and outputs LVDS levels
with a typical differential output swing of 330 mV which pro-
vides low EMI at ultra low power dissipation even at high
frequencies. The FIN1102 provides a VBB reference for AC
■ Greater than 800 Mbps full differential path
■ 3.3V power supply operation
■ 3.5 ps maximum random jitter and 135 ps maximum
deterministic jitter
■ Wide rail-to-rail common mode range
■ LVDS receiver inputs accept LVPECL, HSTL, and
SSTL-2 directly
coupling on the inputs. In addition the FIN1102 can also
directly accept LVPECL, HSTL, and SSTL-2 for translation
to LVDS.
■ Ultra low power consumption
■ 20 ps typical channel-to-channel skew
■ Power off protection
■ > 7 kV HBM ESD Protection
■ Meets or exceeds the TIA/EIA-644-A LVDS standard
■ 14-lead TSSOP package saves space
■ Open circuit fail safe protection
■ VBB reference output
Ordering Code:
Order Number Package Number
Package Description
FIN1102MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pin Descriptions
Connection Diagram
Pin Name
Description
RIN1+, RIN2+
RIN1−, RIN2−
Non-inverting LVDS Input
Inverting LVDS Input
DOUT1+, DOUT2+ Non-inverting Driver Output
DOUT1−, DOUT2− Inverting Driver Output
EN
Driver Enable Pin for All Output
Power Supply
VCC
GND
VBB
Ground
Reference Voltage Output
Function Table
Inputs
Outputs
Functional Diagram
DIN+
DIN−
DOUT+
DOUT−
EN
H
H
L
L
H
L
L
H
L
H
H
H
Fail Safe Case
H
Z
L
X
X
Z
H = HIGH Logic Level
L = LOW Logic Level
X = Don't Care
Z = High Impedance
© 2002 Fairchild Semiconductor Corporation
DS500657
www.fairchildsemi.com