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FIN1031MTCX_NL PDF预览

FIN1031MTCX_NL

更新时间: 2024-10-27 13:07:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
6页 206K
描述
Line Driver, 4 Func, 4 Driver, PDSO16, 4.40 MM, MO-153, TSSOP-16

FIN1031MTCX_NL 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, MO-153, TSSOP-16
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.48Is Samacsys:N
差分输出:YES驱动器位数:4
输入特性:STANDARD接口集成电路类型:LINE DRIVER
接口标准:EIA-644; TIA-644JESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:5 mm
湿度敏感等级:1功能数量:4
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C最小输出摆幅:0.25 V
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified最大接收延迟:
座面最大高度:1.2 mm子类别:Line Driver or Receivers
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
最大传输延迟:2 ns宽度:4.4 mm
Base Number Matches:1

FIN1031MTCX_NL 数据手册

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July 2001  
Revised July 2001  
FIN1031  
3.3V LVDS 4-Bit High Speed Differential Driver  
General Description  
Features  
This quad driver is designed for high speed interconnects  
utilizing Low Voltage Differential Signaling (LVDS) technol-  
ogy. The driver translates LVTTL signal levels to LVDS lev-  
els with a typical differential output swing of 350mV which  
provides low EMI at ultra low power dissipation even at  
high frequencies. This device is ideal for high speed trans-  
fer of clock and data.  
Greater than 400Mbs data rate  
3.3V power supply operation  
0.4ns maximum differential pulse skew  
2.0ns maximum propagation delay  
Low power dissipation  
Power OFF protection  
The FIN1031 can be paired with its companion receiver,  
the FIN1032, or any other Fairchild LVDS receiver.  
Meets or exceeds the TIA/EIA-644 LVDS standard  
Pin compatible with equivalent RS-422 and LVPECL  
devices  
16-Lead SOIC and TSSOP packages save space  
Ordering Code:  
Order Number Package Number  
Package Description  
FIN1031M  
M16A  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
FIN1031MTC  
MTC16  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Function Table  
Connection Diagram  
Inputs  
Outputs  
DIN  
DOUT+  
DOUT−  
EN  
H
H
H
X
EN  
X
X
X
L
H
H
L
L
H
L
L
Z
L
H
H
L
L
OPEN  
H
X
L
L
H
H
Z
X
L
OPEN  
X
L
H
H = HIGH Logic Level  
X = Don’t Care  
L = LOW Logic Level  
Z = High Impedance  
Pin Descriptions  
Pin Name  
Description  
LVTTL Data Inputs  
DIN1, DIN2, DIN3, DIN4  
DOUT1+, DOUT2+, DOUT3+, DOUT4+ Non-Inverting Driver Outputs  
DOUT1, DOUT2, DOUT3, DOUT4Inverting Driver Outputs  
EN  
Driver Enable Pin  
EN  
VCC  
GND  
Inverting Driver Enable Pin  
Power Supply  
Ground  
© 2001 Fairchild Semiconductor Corporation  
DS500507  
www.fairchildsemi.com  

FIN1031MTCX_NL 替代型号

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