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FIN1019MMTC PDF预览

FIN1019MMTC

更新时间: 2024-10-26 23:52:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 线路驱动器或接收器驱动程序和接口光电二极管
页数 文件大小 规格书
14页 1468K
描述
LINE TRANSCEIVER|1 DRIVER|1 RCVR|TSSOP|14PIN|PLASTIC

FIN1019MMTC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
Is Samacsys:N差分输出:YES
驱动器位数:1高电平输入电流最大值:0.00002 A
JESD-30 代码:R-PDSO-G14JESD-609代码:e0
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C最小输出摆幅:0.25 V
最大输出低电流:0.008 A封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:3.3 V认证状态:Not Qualified
最大接收延迟:2.5 ns子类别:Line Driver or Receivers
最大压摆率:12.5 mA标称供电电压:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
Base Number Matches:1

FIN1019MMTC 数据手册

 浏览型号FIN1019MMTC的Datasheet PDF文件第2页浏览型号FIN1019MMTC的Datasheet PDF文件第3页浏览型号FIN1019MMTC的Datasheet PDF文件第4页浏览型号FIN1019MMTC的Datasheet PDF文件第5页浏览型号FIN1019MMTC的Datasheet PDF文件第6页浏览型号FIN1019MMTC的Datasheet PDF文件第7页 
April 2001  
Revised September 2001  
FIN1019  
3.3V LVDS High Speed Differential Driver/Receiver  
General Description  
Features  
This driver and receiver pair are designed for high speed  
interconnects utilizing Low Voltage Differential Signaling  
(LVDS) technology. The driver translates LVTTL signals to  
LVDS levels with a typical differential output swing of  
350mV and the receiver translates LVDS signals, with a  
typical differential input threshold of 100mV, into LVTTL  
levels. LVDS technology provides low EMI at ultra low  
power dissipation even at high frequencies. This device is  
ideal for high speed clock or data transfer.  
Greater than 400Mbs data rate  
3.3V power supply operation  
0.5ns maximum differential pulse skew  
2.5ns maximum propagation delay  
Low power dissipation  
Power-Off protection  
100mV receiver input sensitivity  
Fail safe protection open-circuit, shorted and terminated  
conditions  
Meets or exceeds the TIA/EIA-644 LVDS standard  
Flow-through pinout simplifies PCB layout  
14-Lead SOIC and TSSOP packages save space  
Ordering Code:  
Order Number Package Number  
Package Description  
FIN1019M  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
FIN1019MTC  
MTC14  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Function Table  
Connection Diagram  
Inputs  
Outputs  
ROUT  
RIN+  
RIN−  
RE  
L
L
H
X
H
L
L
H
Z
L
X
H
L
Fail Safe Condition  
H
DIN  
DE  
DOUT+  
DOUT−  
L
H
H
L
L
H
Z
L
H
L
Pin Descriptions  
H
X
Z
Pin Name  
Description  
OpenCircuit or Z  
H
H
DIN  
DOUT+  
DOUT−  
DE  
LVTTL Data Input  
H = HIGH Logic Level  
Z = High Impedance  
L = LOW Logic Level  
Fail Safe = Open, Shorted, Terminated  
X = Don’t Care  
Non-inverting LVDS Output  
Inverting LVDS Output  
Driver Enable (LVTTL, Active HIGH)  
Non-Inverting LVDS Input  
Inverting LVDS Input  
RIN+  
RIN−  
ROUT  
LVTTL Receiver Output  
RE  
VCC  
GND  
NC  
Receiver Enable (LVTTL, Active LOW)  
Power Supply  
Ground  
No Connect  
© 2001 Fairchild Semiconductor Corporation  
DS500506  
www.fairchildsemi.com  

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