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FIN1017 PDF预览

FIN1017

更新时间: 2024-10-26 22:31:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
8页 624K
描述
3.3V LVDS 1-Bit High Speed Differential Driver

FIN1017 数据手册

 浏览型号FIN1017的Datasheet PDF文件第2页浏览型号FIN1017的Datasheet PDF文件第3页浏览型号FIN1017的Datasheet PDF文件第4页浏览型号FIN1017的Datasheet PDF文件第5页浏览型号FIN1017的Datasheet PDF文件第6页浏览型号FIN1017的Datasheet PDF文件第7页 
April 2001  
Revised April 2002  
FIN1017  
3.3V LVDS 1-Bit High Speed Differential Driver  
General Description  
Features  
This single driver is designed for high speed interconnects  
utilizing Low Voltage Differential Signaling (LVDS) technol-  
ogy. The driver translates LVTTL signal levels to LVDS lev-  
els with a typical differential output swing of 350 mV which  
provides low EMI at ultra low power dissipation even at  
high frequencies. This device is ideal for high speed trans-  
fer of clock or data.  
Greater than 600Mbs data rate  
3.3V power supply operation  
0.5ns maximum differential pulse skew  
1.5ns maximum propagation delay  
Low power dissipation  
Power-Off protection  
The FIN1017 can be paired with its companion receiver,  
the FIN1018, or with any other LVDS receiver.  
Meets or exceeds the TIA/EIA-644 LVDS standard  
Flow-through pinout simplifies PCB layout  
8-Lead SOIC and US8 packages save space  
Ordering Code:  
Order Number Package Number  
Package Description  
FIN1017M  
M08A  
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
[TUBE]  
FIN1017MX  
FIN1017K8X  
M08A  
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
[TAPE and REEL]  
MAB08A  
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide  
[TAPE and REEL]  
Connection Diagrams  
8-Lead SOIC  
Pin Assignment for US-8 Package  
Note: Ground pins 4 and 5 for optimum operation.  
TOP VIEW  
Pin Descriptions  
Function Table  
Pin Name  
DIN  
Description  
Input  
DIN  
Outputs  
LVTTL Data Input  
Non-inverting Driver Output  
Inverting Driver Output  
Power Supply  
DOUT+  
DOUT−  
DOUT+  
DOUT−  
VCC  
L
L
H
L
H
L
H
OPEN  
H
GND  
Ground  
H = HIGH Logic Level  
L = LOW Logic Level  
X = Don’t Care  
NC  
No Connect  
© 2002 Fairchild Semiconductor Corporation  
DS500500  
www.fairchildsemi.com  

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