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FGE

更新时间： 2022-01-18 20:38:00

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数据手册

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FGE 数据手册

June 1989

ASIC

FGE Series ECL Gate Arrays

General Description

These advanced ECL gate arrays, ranging from 100 to 6300

equivalent gates, offer the system designer greater speed,

gate density, functional flexibility and temperature ranges

than standard F10K and F100K ECL families.

All FGE Series products interface with F100K or F10K ECL

SSI, MSI and LSI components and, in addition, the

FGE2500 is fuly FAST^TM/TTL compatible. The FGE2500

TTL interface eliminates requirements for separate off-chip

signal converters in mixed logic level systems, thereby re-

sulting in reduced board space and cost, as well as avoiding

the performance and reliability penalties associated with off-

chip signal converters.

With system clock frequencies up to 600 MHz in some appli-

cations and a 225-ps typical macro propagation delay, the

FGE Series is especially well-suited for such high-perform-

ance applications as mainframe and supermini computers,

fiber-optic communications, as well as many military and

aerospace systems.

Features

100, 680, 2500, 2840 and 6300 equivalent gates

The FGE Series utilizes a cell-based, two-level series gate

(cascade) circuit structure which provides greater logic com-

plexity and reduces power levels compared to single-level

gating. An extensive macro library, common to all FGE ar-

rays, contains more than 80 SSI/MSI logic functions and

100 supporting I/O macros. Additionally, internal macros

may be grouped to form reusable ‘‘soft macros’’ with even

greater complexity functions.

Proven 1.5 micron FAST-Z Fine-Line process

System clock frequency up to 600 MHz

Typical internal logic performance (2-input OR)

FGE6300

225 ps 5.2 mW

Other FGE Series Arrays

225 ps 9 mW

300 ps 2.7 mW

300 ps 4.8 mW

570 ps 1.3 mW

570 ps 2.5 mW

All National ECL gate arrays feature CAD programmable

speed/power options that allow the designer to maximize

performance by individually assigning the switching speed

and output drive currents for each internal macro. The

speed/power feature provides maximum ECL speed where

needed yet allows overall chip power to remain at air-coola-

ble levels.

CAD programmable speed/power options

F100K or F10K ECL compatible I/Os

Mixable TTL/ECL I/Os (FGE2500)

Allows large number of unbalanced simultaneously

switching outputs

Specification Summary

Military Capability

The FGE6300 utilizes slight process enhancements to

achieve a 30% power-per-gate reduction over other FGE

Series gate arrays. Thus, with 80% utilization of gates speci-

fied at high power, the FGE6300 dissipates about 13W.

Lower power settings and use of on-chip internal termina-

Yes

Fabrication

Technology

ECL Fine Line

FAST-Z Gate Array

Gate Lengths &

Routing Layers

1.5 mm, Three Layers

tion to 2V can reduce the total power dissipation to as

little as 5W. A proprietary multi-layer 301 pin with controlled-

impedance pin grid array package accommodates mounting

of decoupling capacitors on the package to reduce noise.

Gate Range

50–6,300

Typical Delay

225–570 ps

FAST^TMis a trademark of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/U/10481

RRD-B30M115/Printed in U. S. A.

12 3 4

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与FGE相关器件

型号	品牌	获取价格	描述	数据表
FGE.0B.302.CLAD52Z	ETC	获取价格	CONN PLUG MALE 2POS SOLDER CUP
FGE.1B.306.CYZZ	ETC	获取价格	CONN HSG PLUG 6POS CABLE PIN
FGE.1B.308.CLAD42Z	ETC	获取价格	CONN PLUG MALE 8POS SOLDER CUP
FGE.1B.308.CLAD62Z	ETC	获取价格	CONN PLUG MALE 8POS SOLDER CUP
FGE.1B.308.CYCD76	ETC	获取价格	CONN PLUG MALE 8POS GOLD CRIMP
FGE.1B.310.CYCD42Z	ETC	获取价格	CONN PLUG MALE 10POS GOLD CRIMP
FGE.2B.310.CLAD82Z	ETC	获取价格	CONN PLUG MALE 10POS SOLDER CUP
FGE.2B.310.CYCD82	ETC	获取价格	CONN PLUG MALE 10POS GOLD CRIMP
FGE.2B.310.CYCD99	ETC	获取价格	CONN PLUG MALE 10POS GOLD CRIMP
FGE.2B.319.CYCD99	ETC	获取价格	CONN PLUG MALE 19POS GOLD CRIMP

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