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FDV301N PDF预览

FDV301N

更新时间: 2024-11-09 12:49:47
品牌 Logo 应用领域
TYSEMI 晶体晶体管开关光电二极管PC
页数 文件大小 规格书
2页 218K
描述
SOT-23

FDV301N 数据手册

 浏览型号FDV301N的Datasheet PDF文件第2页 
Product specification  
FDV301N  
General Description  
Features  
25 V, 0.22 A continuous, 0.5 A Peak.  
This N-Channel logic level enhancement mode field effect  
transistor is produced using Fairchild's proprietary, high cell  
density, DMOS technology. This very high density process is  
especially tailored to minimize on-state resistance. This  
device has been designed especially for low voltage  
applications as a replacement for digital transistors. Since  
bias resistors are not required, this one N-channel FET can  
replace several different digital transistors, with different bias  
resistor values.  
RDS(ON) = 5 W @ VGS= 2.7 V  
RDS(ON) = 4 W @ VGS= 4.5 V.  
Very low level gate drive requirements allowing direct  
operation in 3V circuits. VGS(th) < 1.5V.  
Gate-Source Zener for ESD ruggedness.  
>6kV Human Body Model  
Replace multiple NPN digital transistors with one DMOS  
FET.  
SuperSOTTM-8  
SuperSOTTM-6  
SOT-23  
SO-8  
SOIC-16  
SOT-223  
Mark:301  
INVERTER APPLICATION  
Vcc  
D
D
OUT  
IN  
G
S
GND  
S
G
Absolute Maximum Ratings TA = 25oC unless other wise noted  
Symbol  
Parameter  
FDV301N  
25  
Units  
VDSS, VCC Drain-Source Voltage, Power Supply Voltage  
V
V
A
VGSS, VI  
ID, IO  
Gate-Source Voltage, VIN  
Drain/Output Current  
8
- Continuous  
0.22  
0.5  
PD  
Maximum Power Dissipation  
0.35  
W
°C  
kV  
TJ,TSTG  
ESD  
Operating and Storage Temperature Range  
-55 to 150  
6.0  
Electrostatic Discharge Rating MIL-STD-883D  
Human Body Model (100pf / 1500 Ohm)  
THERMAL CHARACTERISTICS  
RqJA  
Thermal Resistance, Junction-to-Ambient  
357  
°C/W  
http://www.twtysemi.com  
1 of 2  
4008-318-123  

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