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FDD86113LZ PDF预览

FDD86113LZ

更新时间: 2024-10-03 17:15:31
品牌 Logo 应用领域
友台半导体 - UMW /
页数 文件大小 规格书
6页 451K
描述
种类:N-Channel;漏源电压(Vdss):100V;持续漏极电流(Id)(在25°C时):4.2A;Vgs(th)(V):±20;漏源导通电阻:100mΩ@10V

FDD86113LZ 数据手册

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R
FDD86113  
N-Channel MOSFET  
UMW  
100V  
General Description  
This N-Channel logic Level MOSFETs are produced using  
advanced process that incorporates Shielded Gate  
technology. This process has been optimized for the onsta-  
te resistance and yet maintain superior switching  
performance.  
Features  
Shielded Gate MOSFET Technology  
100V  
V
DS  
=
I (at V =10V)4.2A  
D
GS  
R
DS(ON)  
R
DS(ON)  
(at V =10V) < 104mΩ  
GS  
(at V = 4.5V) < 156mΩ  
GS  
HBM ESD protection level > 6 kV typical (Note 4)  
High performance trench technology for extremely low R  
DS(on)  
High power and current handling capability in a widely used  
surface mount package  
Application  
DC-DC conversion  
MOSFET Maximum Ratings  
T = 25 °C unless otherwise noted  
C
Symbol  
Parameter  
Ratings  
100  
±20  
5.5  
Units  
VDS  
VGS  
Drain to Source Voltage  
Gate to Source Voltage  
Drain Current  
V
V
-Continuous  
TC = 25 °C  
TA = 25 °C  
ID  
-Continuous  
(Note 1a)  
(Note 3)  
4.2  
A
-Pulsed  
Single Pulse Avalanche Energy  
Power Dissipation  
15  
EAS  
12  
mJ  
W
TC = 25 °C  
TA = 25 °C  
29  
PD  
Power Dissipation  
(Note 1a)  
3.1  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +150  
°C  
Thermal Characteristics  
RθJC  
RθJA  
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
(Note 1)  
4.3  
96  
°C/W  
(Note 1a)  
www.umw-ic.com  
1
UTD Semiconductor Co.,Limited  

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