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FDC37B787-NS PDF预览

FDC37B787-NS

更新时间: 2024-02-21 18:48:34
品牌 Logo 应用领域
SMSC 控制器时钟
页数 文件大小 规格书
249页 865K
描述
Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR

FDC37B787-NS 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:FQFP, QFP128,.67X.93,20
针数:128Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.53
其他特性:GAME PORT地址总线宽度:16
边界扫描:NO总线兼容性:ISA; PCI; IBM PC-XT; IBM PC-AT
最大时钟频率:14.318 MHz外部数据总线宽度:8
JESD-30 代码:R-PQFP-G128JESD-609代码:e0
长度:20 mm湿度敏感等级:3
I/O 线路数量:28端子数量:128
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:FQFP
封装等效代码:QFP128,.67X.93,20封装形状:RECTANGULAR
封装形式:FLATPACK, FINE PITCH峰值回流温度(摄氏度):220
电源:5 V认证状态:Not Qualified
座面最大高度:3.4 mm子类别:Other Microprocessor ICs
最大压摆率:90 mA最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:14 mm

FDC37B787-NS 数据手册

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FDC37B78x  
Super I/O Controller with ACPI Support,  
Real Time Clock and Consumer IR  
FEATURES  
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5 Volt Operation  
PC98/99 and ACPI 1.0 Compliant  
Battery Back-up for Wake-Events  
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128 Bytes of CMOS RAM Lockable in  
4x32 Byte Blocks  
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12 and 24 Hour Time Format  
Binary and BCD Format  
ISA Plug-and-Play Compatible Register Set  
5μA Standby Battery Current (max)1  
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12 IRQ Options  
15 Serial IRQ Options  
16 Bit Address Qualification  
Four DMA Options  
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2.88MB Super I/O Floppy Disk Controller  
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Relocatable to 480 Different Addresses  
Licensed CMOS 765B Floppy Disk  
Controller  
12mA AT Bus Drivers  
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BIOS Buffer  
20 GPI/O Pins  
32KHz Standby Clock Output  
Soft Power Management  
ACPI/PME Support  
SCI/SMI Support  
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Advanced Digital Data Separator  
SMSC's Proprietary 82077AA  
Compatible Core  
Sophisticated Power Control Circuitry  
(PCC) Including Multiple Powerdown  
Modes for Reduced Power  
Consumption  
Supports Two Floppy Drives Directly  
Software Write Protect  
FDC on Parallel Port  
Low Power CMOS Design  
Supports Vertical Recording Format  
16 Byte Data FIFO  
100% IBM Compatibility  
Detects All Overrun and Underrun  
Conditions  
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Watchdog timer  
Power Button Override Event  
Either Edge Triggered Interrupts  
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Intelligent Auto Power Management  
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Shadowed Write-only Registers  
Programmable Wake-up Event Interface  
8042 Keyboard Controller  
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2K Program ROM  
256 Bytes Data RAM  
Asynchronous Access to Two Data  
Registers and One Status Register  
Supports Interrupt and Polling Access  
8 Bit Timer/Counter  
Port 92 Support  
Fast Gate A20 and Hardware Keyboard  
Reset  
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24mA Drivers and Schmitt Trigger  
Inputs  
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Enhanced FDC Digital Data Separator  
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Low Cost Implementation  
No Filter Components Required  
2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps,  
250 Kbps Data Rates  
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Real Time Clock  
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Day of Month Alarm, Century Byte  
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Programmable Precompensation  
Modes  
MC146818 and DS1287 Compatible  
256 Bytes of Battery Backed CMOS in  
Two Banks of 128 Bytes  
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