FAN5910
Multi-Mode Buck Converter
with LDO Assist for GSM /
EDGE, 3G/3.5G and 4G PAs
Description
The FAN5910 is a high−efficiency, low−noise, synchronous,
step−down, DC−DC converter optimized for powering Radio
Frequency (RF) Power Amplifiers (PAs) in handsets and other mobile
applications. Load currents up to 2.5 A are allowed, which enables
GSM / EDGE, 3G/3.5G, and 4G platforms under very poor VSWR
conditions.
www.onsemi.com
12KK
XYZ
WLCSP
16 BUMP
The output voltage may be dynamically adjusted from 0.40 V to
3.60 V, proportional to an analog input voltage V
ranging from
CON
CASE 567SD
0.16 V to 1.44 V, optimizing power−added efficiency. Fast transition
times are achieved, allowing excellent inter−slot settling.
An integrated LDO is automatically enabled under heavy load
conditions or when the battery voltage and voltage drop across the
DC−DC PMOS device are within a set range of the desired output
voltage. This LDO−assist feature supports heavy load currents under
12
= Alphanumeric Device Code
(See Ordering Information for
specific marking)
KK
X
Y
= Lot Run Number
= Alphabetical Year Code
= 2−weeks Date Code
= Assembly Plant Code
Z
the most stringent battery and V
conditions while maintaining
SWR
high efficiency, low dropout, and superior spectral performance.
The FAN5910 DC−DC operates in PWM Mode with a 2.9 MHz
switching frequency and supports a single, small form−factor inductor
ranging from 1.0 mH to 2.2 mH. In addition, PFM operation is allowed
at low load currents for output voltages below 1.5 V to maximize
efficiency. PFM operation can be disabled by setting MODE pin to
LOW.
When output regulation is not required, the FAN5910 may
• 2.9 MHz PWM Mode
be placed in Sleep Mode by setting V
below 100 mV
CON
• Sleep Mode for ~50 mA Standby Current Consumption
nominally. This ensures a very low I (<50 mA) while
Q
• Forced PWM Mode
enabling a fast return to output regulation.
♦ Up to 95% Efficient Synchronous Operation in High
Power Conditions
FAN5910 is available in a low profile, small form factor,
16 bump, Wafer−Level Chip−Scale Package (WLCSP) that
is 1.615 mm x 1.615 mm. Only three external components
are required: two 0402 capacitors and one 2016 inductor.
♦ 2.9 MHz PWM−Only Mode
• Auto PFM/PWM Mode
♦ 2.9 MHz PWM Operation at High Power and PFM
Operation at Low Power and Low Output Voltage
for Maximum Low Current Efficiency
Features
2
• Solution Size < 9.52 mm
• 2.7 V to 5.5 V Input Voltage Range
Applications
• V
Range from 0.40 V to 3.60 V (or V )
IN
OUT
• Dynamic Supply Bias for Polar or Linear GSM / EDGE
PAs and 3G/3.5G and 4G PAs
• Dynamic Supply Bias for GSM / EDGE Quad Band
Amplifiers for Mobile Handsets and Data Cards
• Single, Small Form−Factor Inductor
• 29 mW Integrated LDO
• 100% Duty Cycle for Low−Dropout Operation
• Input Under−Voltage Lockout / Thermal Shutdown
• 1.615 mm x 1.615 mm, 16−Bump, 0.4 mm Pitch
WLCSP
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
March, 2019 − Rev. 0
FAN5910/D
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