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FDMF6704V

更新时间: 2024-01-13 09:48:58
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器MOSFET驱动器驱动程序和接口接口集成电路服务器主板节能技术
页数 文件大小 规格书
13页 834K
描述
The Xtra Small, High Performance, High Frequency DrMOS Module with LDO

FDMF6704V 技术参数

是否无铅:不含铅生命周期:Active
包装说明:HVQCCN,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.66
Is Samacsys:N高边驱动器:YES
接口集成电路类型:HALF BRIDGE BASED MOSFET DRIVERJESD-30 代码:S-XQCC-N40
JESD-609代码:e4长度:6 mm
湿度敏感等级:1功能数量:1
端子数量:40标称输出峰值电流:0.2 A
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:0.8 mm最大供电电压:14 V
最小供电电压:8 V标称供电电压:12 V
表面贴装:YES端子面层:Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6 mmBase Number Matches:1

FDMF6704V 数据手册

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August 2009  
FDMF6704V - XSTM DrMOS  
tm  
The Xtra Small, High Performance, High Frequency DrMOS Module with LDO  
Benefits  
General Description  
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Single 12 V power supply operation.  
The XSTM DrMOS family is Fairchild’s next-generation fully-  
optimized, ultra-compact, integrated MOSFET plus driver power  
stage solutions for high current, high frequency synchronous  
buck DC-DC applications. The FDMF6704V XSTM DrMOS  
integrates a driver IC, two power MOSFETs and a bootstrap  
Schottky diode along with an integrated 5 V gate drive LDO  
regulator into a thermally enhanced, ultra compact 6 mm x 6  
mm MLP package. With an integrated approach, the complete  
switching power stage is optimized with regards to driver and  
MOSFET dynamic performance, system inductance and  
Ultra compact size - 6 mm x 6 mm MLP, 44 % space  
saving compared to conventional MLP 8 mm x 8 mm  
DrMOS packages.  
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Ultra compact thermally enhanced 6 mm x 6 mm MLP  
package 84 % smaller than conventional discrete solutions.  
Fully optimized system efficiency.  
Clean voltage waveforms with reduced ringing.  
High frequency operation.  
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Compatible with a wide variety of PWM controllers in the  
market.  
R
. This greatly reduces the package parasitics and layout  
DS(ON)  
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Single input voltage operation.  
challenges associated with conventional discrete solutions.  
TM  
XS  
DrMOS  
uses  
Fairchild's  
high  
performance  
TM  
Features  
PowerTrench  
5 MOSFET technology, which dramatically  
reduces ringing in synchronous buck converter applications.  
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Internal 12 V to 5 V regulator.  
Synchronous driver plus FET multichip module.  
High current handling of 35 A.  
Over 93 % peak efficiency.  
Tri-State PWM input.  
Fairchild's PowerTrench® 5 technology MOSFETs for clean  
voltage waveforms and reduced ringing.  
Optimized for high switching frequencies of up to 1 MHz.  
Skip mode SMOD [low side gate turn off] input.  
Fairchild SyncFETTM [integrated Schottky diode] technology  
in the low side MOSFET.  
TM  
PowerTrench 5 can eliminate the need for a snubber circuit in  
buck converter applications. The driver IC incorporates  
advanced features such as SMOD for improved light load  
efficiency and a Tri-State PWM input for compatibility with a  
wide range of PWM controllers. A 5 V gate drive and an  
improved PCB interface, optimized for a maximum low side FET  
exposed pad area, ensure higher performance. This product is  
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compatible with the new Intel  
specification.  
6 mm x 6 mm DrMOS  
Applications  
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Integrated bootstrap Schottky diode.  
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Compact blade servers V-core, non V-core and VTT DC-DC  
converters.  
Desktop computers V-core, non V-core and VTT DC-DC  
converters.  
Workstations V-core, non V-core and VTT DC-DC  
converters.  
Adaptive gate drive timing for shoot-through protection.  
Driver output disable function [DISB# pin].  
Undervoltage lockout (UVLO).  
Fairchild Green Packaging and RoHS  
compliant. Low profile SMD package.  
Gaming Motherboards V-core, non V-core and VTT DC-DC  
converters.  
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Gaming consoles.  
High-current DC-DC Point of Load (POL) converters.  
Networking and telecom microprocessor voltage regulators.  
Power Train Application Circuit  
V
DRV  
C
VDRV  
V
C
IN  
VCIN  
C
VIN  
VDRV  
VCIN  
VIN  
R
BOOT  
DISB#  
DISB#  
PWM  
BOOT  
C
BOOT  
PWM Input  
OFF  
L
PHASE  
VSWH  
OUT  
SMOD#  
OUTPUT  
ON  
C
CGND PGND  
OUT  
Figure 1. Power Train Application Circuit  
Ordering Information  
Order Number  
Marking  
Temperature Range  
Device Package  
Packing Method  
Quantity  
FDMF6704V  
FDMF6704V_1  
-55 °C to 150 °C  
40 Pin, 3 DAP, MLP 6x6 mm  
Tape and Reel  
3000  
©2008 Fairchild Semiconductor Corporation  
FDMF6704V Rev.C  
1
www.fairchildsemi.com  

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