74F569SJ

更新时间： 2024-02-27 20:20:15

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		计数器
页数	文件大小	规格书
9页	86K
描述
4-Bit Bidirectional Counter with 3-STATE Outputs

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数据手册

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74F569SJ 数据手册

April 1988

Revised August 1999

74F569

4-Bit Bidirectional Counter with 3-STATE Outputs

General Description

Features

The 74F569 is a fully synchronous, reversible counter with

3-STATE outputs. The 74F569 is a binary counter, featur-

ing preset capability for programmable operation, carry loo-

kahead for easy cascading, and a U/D input to control the

direction of counting. For maximum flexibility there are both

synchronous and master asynchronous reset inputs as well

as both Clocked Carry (CC) and Terminal Count (TC) out-

puts. All state changes except Master Reset are initiated by

the rising edge of the clock. A HIGH signal on the Output

■ Synchronous counting and loading

■ Lookahead carry capability for easy cascading

■ Preset capability for programmable operation

■ 3-STATE outputs for bus organized systems

Enable (OE) input forces the output buffers into the high

impedance state but does not prevent counting, resetting

or parallel loading.

Ordering Code:

Order Number Package Number

Package Description

74F569SC

74F569SJ

74F569PC

M20B

M20D

N20A

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

FAST is a registered trademark of Fairchild Semiconductor Corporation.

DS009565

www.fairchildsemi.com

12 3 4 5 6 7...9

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