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74AC191 PDF预览

74AC191

更新时间: 2024-01-09 09:06:46
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器时钟
页数 文件大小 规格书
10页 117K
描述
Up/Down Counter with Preset and Ripple Clock

74AC191 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:5.30 MM, EIAJ TYPE2, SOP-16
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.66
其他特性:TCO OUTPUT计数方向:BIDIRECTIONAL
系列:ACJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:10.2 mm
负载电容(CL):50 pF负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:65000000 Hz
最大I(ol):0.012 A工作模式:SYNCHRONOUS
湿度敏感等级:1位数:4
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3/5 V
传播延迟(tpd):16 ns认证状态:Not Qualified
座面最大高度:2.1 mm子类别:Counters
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:5.3 mm最小 fmax:133 MHz
Base Number Matches:1

74AC191 数据手册

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November 1988  
Revised November 1999  
74AC191  
Up/Down Counter with Preset and Ripple Clock  
General Description  
Features  
The AC191 is a reversible modulo 16 binary counter. It fea-  
tures synchronous counting and asynchronous presetting.  
The preset feature allows the AC191 to be used in pro-  
grammable dividers. The Count Enable input, the Terminal  
Count output and the Ripple Clock output make possible a  
variety of methods of implementing multistage counters. In  
the counting modes, state changes are initiated by the ris-  
ing edge of the clock.  
ICC reduced by 50%  
High speed—133 MHz typical count frequency  
Synchronous counting  
Asynchronous parallel load  
Cascadable  
Outputs source/sink 24 mA  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC191SC  
74AC191SJ  
74AC191MTC  
74AC191PC  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
Count Enable Input  
Clock Pulse Input  
CE  
CP  
P0P3  
Parallel Data Inputs  
Asynchronous Parallel Load Input  
Up/Down Count Control Input  
Flip-Flop Outputs  
PL  
U /D  
Q0Q3  
RC  
Ripple Clock Output  
TC  
Terminal Count Output  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009940  
www.fairchildsemi.com  

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