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100336QIX PDF预览

100336QIX

更新时间: 2024-02-01 03:56:45
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 移位寄存器计数器触发器逻辑集成电路
页数 文件大小 规格书
14页 152K
描述
Counter/Shift Register

100336QIX 技术参数

生命周期:Active包装说明:SOP,
Reach Compliance Code:compliant风险等级:5.57
Is Samacsys:N其他特性:CAN ALSO BE OPERATED AS A COUNTER
计数方向:BIDIRECTIONAL系列:100K
JESD-30 代码:R-PDSO-G24长度:15.4 mm
逻辑集成电路类型:PARALLEL IN SERIAL OUT位数:4
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE传播延迟(tpd):1.8 ns
座面最大高度:2.65 mm表面贴装:YES
技术:ECL温度等级:OTHER
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:7.5 mm最小 fmax:350 MHz
Base Number Matches:1

100336QIX 数据手册

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August 1989  
Revised August 2000  
100336  
Low Power 4-Stage Counter/Shift Register  
vidual Preset (Pn) inputs are used to enter data in parallel  
General Description  
The 100336 operates as either a modulo-16 up/down  
counter or as a 4-bit bidirectional shift register. Three  
Select (Sn) inputs determine the mode of operation, as  
or to preset the counter in programmable counter applica-  
tions. A HIGH signal on the Master Reset (MR) input over-  
rides all other inputs and asynchronously clears the flip-  
flops. In addition, a synchronous clear is provided, as well  
as a complement function which synchronously inverts the  
contents of the flip-flops. All inputs have 50 kpull-down  
resistors.  
shown in the Function Select table. Two Count Enable  
(CEP, CET) inputs are provided for ease of cascading in  
multistage counters. One Count Enable (CET) input also  
doubles as a Serial Data (D0) input for shift-up operation.  
For shift-down operation, D3 is the Serial Data input. In  
Features  
counting operations the Terminal Count (TC) output goes  
LOW when the counter reaches 15 in the count/up mode or  
0 (zero) in the count/down mode. In the shift modes, the TC  
output repeats the Q3 output. The dual nature of this TC/Q3  
40% power reduction of the 100136  
2000V ESD protection  
Pin/function compatible with 100136  
Voltage compensated operating range = −4.2V to 5.7V  
Available to industrial grade temperature range  
output and the D0/CET input means that one interconnec-  
tion from one stage to the next higher stage serves as the  
link for multistage counting or shift-up operation. The indi-  
Ordering Code:  
Order Number Package Number  
Package Description  
100336SC  
100336PC  
100336QC  
100336QI  
M24B  
N24E  
V28A  
V28A  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide  
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square  
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square  
Industrial Temperature Range (40°C to +85°C)  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
24-Pin DIP/SOIC  
28-Pin PLCC  
Logic Symbol  
© 2000 Fairchild Semiconductor Corporation  
DS010584  
www.fairchildsemi.com  

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