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F558L-1.800MHZ PDF预览

F558L-1.800MHZ

更新时间: 2024-11-23 20:39:55
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描述
Oscillator

F558L-1.800MHZ 技术参数

是否Rohs认证: 符合生命周期:Active
Reach Compliance Code:compliant风险等级:5.57
JESD-609代码:e4端子面层:Gold (Au) - with Nickel (Ni) barrier
Base Number Matches:1

F558L-1.800MHZ 数据手册

 浏览型号F558L-1.800MHZ的Datasheet PDF文件第2页 
HCMOS 5x3.2mm 5.0V SMD Oscillator  
RoHS Compliant / Pꢁ Free  
Model: F550L SERIES  
Rev. 5/7/2009  
Page 1 of 2  
http://www.foxonline.com/need_a_sample.htm  
FEATURES  
• 5.0V Operation  
• HCMOS Output  
• Tape and Reel (1,000 pcs. STD)  
• PART ꢀUMbER SELECTIOLearn More - Internet Required  
5.0 ± 0.2  
Model  
# 4  
# 3  
Frequency  
Operating  
Frequency  
Part Number  
Stability1 Temperature (ºC) Range (MHz)  
Number  
477-Frequency-xxxxx  
478-Frequency-xxxxx  
479-Frequency-xxxxx  
675-Frequency-xxxxx  
494-Frequency-xxxxx  
608-Frequency-xxxxx  
Top  
±100PPM  
±100PPM  
±50PPM  
±50PPM  
±25PPM  
±20PPM*  
-10 ~ +70  
-40 ~ +85  
-10 ~ +70  
-40 ~ +85  
-10 ~ +70  
-10 ~ +70  
1.800 ~ 50.000  
1.800 ~ 50.000  
1.800~ 50.000  
1.800~ 50.000  
1.800~ 50.000  
1.800~ 50.000  
F550L  
F550LR  
F555L  
F555LR  
F556L  
F558L  
3.2 ± 0.2  
View  
Dot denotes  
pin 1  
# 2  
# 1  
• ELECTRICAL CHARACTERISTICS  
1.3 Max  
MAX (unless otherwise noted)  
PARAMETERS  
Frequency Range (Fo)  
Storage Temperature Range (Tstg)  
1.800 ~ 50.000 MHz  
-55ºC ~ +125ºC  
5.0V ± 5%  
2.54±0.1  
# 2  
Supply Voltage  
Input Current  
(Vdd)  
(Idd)  
# 1  
1.800 ~ 50.000 MHz  
35mA  
40% ~ 60%  
10nS  
Bottom  
View  
Output Symmetry (50% Vdd)  
Rise Time (10% ~ 90% Vdd) (Tr)  
Fall Time (90% ~ 10% Vdd) (Tf)  
# 3  
# 4  
1.2  
1.0  
10nS  
Output Voltage  
(Vol)  
(Voh)  
(Iol)  
10% Vdd  
90% Vdd Min  
4mA Min  
4mA Min  
15pF  
10mS  
100nS  
100nS  
Output Current  
Recommended  
(Ioh)  
Solder Pad Layout  
Output Load  
Start-up Time  
(HCMOS)  
(Ts)  
2.54  
Output Disable Time 2  
Output Enable Time 2  
1.29  
2.25  
1 Inclusive of 25ºC tolerance, operating temperature range, input voltage change, load change, ag-  
ing, shock, and vibration. *Excludes Shock/Vibration  
2 An internal pullup resistor from pin 1 to pin 4 allows active output if pin 1 is left open.  
Note: A 0.01µF capacitor should be placed between Vdd (Pin 4) and GND (Pin2) to minimize  
power supply noise.  
1.24  
*Dimensional drawing is for reference to critical specifications defined by size measurements.  
Certain non-critical visual attributes, such as side castellations, reference pin shape, etc. may  
vary. All specifications subject to change without notice.  
Pin Connections  
#1 E/D  
#2 GꢀD  
#3 Output  
#4 V DD  
• EꢀAbLE / DISAbLE FUꢀCTIOꢀ  
INH (Pin 1)  
OPEN 2  
OUTPUT (Pin 3)  
ACTIVE  
'1' Level Vih 70% Vdd  
'0' Level Vil 30% Vdd  
ACTIVE  
High Z  
FOXElectronics 5570 Enterprise Parkway Fort Myers, Florida 33905 USA +1.239.693.0099 FAX +1.239.693.1554 http://www.foxonline.com  
EMEA Tel/Fax: +44 .1767.312632 | Asia Hong Kong Tel: +852.2854.4285 Fax +852.2854.4282  
| Japan Tel: +81.3.3374/2079 Fax: +81.3.3374.5221  
© 2009 FOX ELECTRONICS | ISO9001:2000 Certified  

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