Datasheet > F50L1G41LB

F50L1G41LB

更新时间： 2024-02-20 07:03:50

品牌	Logo	应用领域
晶豪 - ESMT		/
页数	文件大小	规格书
49页	1415K
描述
3.3V 1 Gbit SPI-NAND Flash Memory

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中文翻译

获取价格

数据手册

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F50L1G41LB 数据手册

ESMT

F50L1G41LB (2M)

3.3V 1 Gbit

SPI-NAND Flash Memory

Flash

PRODUCT LIST

Parameters

Values

3.3V

V_CC

Width

x1, x2¹, x4

104MHz

1-bit

Frequency

Internal ECC Correction

Transfer Rate

9.6ns

Loading Throughput

Power-up Ready Time

Max Reset Busy Time

Note: 1. x2 PROGRAM operation is not defined.

104MT/s

1ms (maximum value)

FEATURES



Voltage Supply: 3.3V (2.7V~3.6V)

Organization

- Memory Cell Array: (128M + 4M) x 8bit

- Data Register: (2K + 64) x 8bit

Automatic Program and Erase

- Page Program: (2K + 64) Byte

- Block Erase: (128K + 4K) Byte

Page Read Operation

- Page Size: (2K + 64) Byte

- Read from Cell to Register with Internal ECC: 100us



Hardware Data Protection

- Program/Erase Lockout During Power Transitions

Reliable CMOS Floating Gate Technology

- Internal ECC Requirement: 1bit/512Byte

- Endurance: 100K Program/Erase cycles

- Data Retention: 10 years

Command Register Operation

NOP: 4 cycles

OTP Operation

Bad-Block-Protect

Boot Read



Memory Cell: 1bit/Memory Cell

Support SPI-Mode 0 and SPI-Mode 3¹

Fast Write Cycle Time

- Program time:400us

- Block Erase time: 4ms

Note: 1. Mode 0: CPOL = 0, CPHA = 0; Mode 3: CPOL = 1, CPHA = 1

ORDERING INFORMATION

Product ID

Speed

104MHz

Package

Comments

F50L1G41LB-104YG2M

F50L1G41LB-104YG2ME

8-contact WSON

8-contact WSON (without expose metal pad)

8x6mm

Pb-free

Elite Semiconductor Memory Technology Inc.

Publication Date: Jan. 2019

Revision: 1.2 1/49

12 3 4 5 6 7...49

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