Datasheet > 存储 > 闪存> F49L400UA-70T

F49L400UA-70T

更新时间： 2024-02-12 11:49:53

品牌	Logo	应用领域
晶豪 - ESMT		闪存存储内存集成电路光电二极管
页数	文件大小	规格书
47页	388K
描述
4 Mbit (512K x 8/256K x 16) 3V Only CMOS Flash Memory

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技术参数
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F49L400UA-70T 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	包装说明：	TSSOP, TSSOP48,.8,20
Reach Compliance Code：	unknown	风险等级：	5.84
Is Samacsys：	N	最长访问时间：	70 ns
备用内存宽度：	8	启动块：	TOP
命令用户界面：	YES	数据轮询：	YES
耐久性：	10000 Write/Erase Cycles	JESD-30 代码：	R-PDSO-G48
JESD-609代码：	e3	内存密度：	4194304 bit
内存集成电路类型：	FLASH	内存宽度：	16
湿度敏感等级：	1	部门数/规模：	1,2,1,7
端子数量：	48	字数：	262144 words
字数代码：	256000	最高工作温度：	70 °C
最低工作温度：		组织：	256KX16
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP48,.8,20	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	并行/串行：	PARALLEL
峰值回流温度（摄氏度）：	225	电源：	3.3 V
认证状态：	Not Qualified	就绪/忙碌：	YES
部门规模：	16K,8K,32K,64K	最大待机电流：	0.0001 A
子类别：	Flash Memories	最大压摆率：	0.04 mA
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	MATTE TIN	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	切换位：	YES
类型：	NOR TYPE	Base Number Matches：	1

F49L400UA-70T 数据手册

EFST

F49L400UA/F49L400BA

4 Mbit (512K x 8/256K x 16)

3V Only CMOS Flash Memory

1. FEATURES

Single supply voltage 3.0V-3.6V

Fast access time: 70/90 ns

Ready/Busy (RY/BY )

- RY/

output pin for detection of program or erase

operation completion

End of program or erase detection

- Data polling

- Toggle bits

Hardware reset

524,288 x 8 / 262,144 x 16 switchable by BYTE pin

Compatible with JEDEC standard

- Pin-out, packages and software commands

compatible with single-power supply Flash

Low power consumption

- 7mA typical active current

- 25uA typical standby current

100,000 program/erase cycles typically

Command register architecture

- Byte programming (9us typical)

- Hardware pin(

RESET

to the read mode

) resets the internal state machine

Sector Protection /Unprotection

- Hardware Protect/Unprotect any combination of sectors

from a program or erase operation.

Low V_CCWrite inhibit is equal to or less than 2.0V

Boot Sector Architecture

- Sector Erase(sector structure: one 16 KB, two 8 KB,

one 32 KB, and seven 64 KB)

Auto Erase (chip & sector) and Auto Program

- Any combination of sectors can be erased

concurrently; Chip erase also provided.

- Automatically program and verify data at specified

address

- U = Upper Boot Sector

- B = Bottom Boot Sector

Packages available:

- 48-pin TSOPI

Erase Suspend/Erase Resume

- Suspend or Resume erasing sectors to allow the

read/program in another sector

2. ORDERING INFORMATION

Part No

Boot

Speed

Package

Part No

Boot

Speed

Package

F49L400UA-70T

F49L400BA-70T

Upper

70 ns

TSOPI

F49L400UA-90T

F49L400BA-90T

Upper

90 ns

TSOPI

Bottom

3. GENERAL DESCRIPTION

The F49L400UA/F49L400BA is a 4 Megabit, 3V only

CMOS Flash memory device organized as 512K bytes of

8 bits or 256K words of 16bits. This device is packaged in

standard 48-pin TSOP. It is designed to be programmed

and erased both in system and can in standard EPROM

programmers.

The F49L400UA/F49L400BA features a sector erase

architecture. The device memory array is divided into one

16 Kbytes, two 8 Kbytes, one 32 Kbytes, and seven 64

Kbytes. Sectors can be erased individually or in groups

without affecting the data in other sectors. Multiple-sector

erase and whole chip erase capabilities provide the

flexibility to revise the data in the device.

With access times of 70 ns and 90 ns, the

F49L400UA/F49L400BA allows the operation of

high-speed microprocessors. The device has separate

The sector protect/unprotect feature disables both

program and erase operations in any combination of the

sectors of the memory. This can be achieved in-system or

via programming equipment.

chip enable

, write enable

, and output enable

controls. EFST's memory devices reliably store

memory data even after 100,000 program and erase

cycles.

A low V_CCdetector inhibits write operations on loss of

power. End of program or erase is detected by the

Ready/Busy status pin, Data Polling of DQ7, or by the

Toggle Bit I feature on DQ6. Once the program or erase

cycle has been successfully completed, the device

internally resets to the Read mode.

The F49L400UA/F49L400BA is entirely pin and

command set compatible with the JEDEC standard for 4

Megabit Flash memory devices. Commands are written to

the command register using standard microprocessor

write timings.

Elite Flash Storage Technology Inc.

Publication Date : Sep. 2006

Revision: 1.1

1/47

12 3 4 5 6 7...47

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与F49L400UA-70T相关器件

型号	品牌	获取价格	描述	数据表
F49L400UA-70TG	ESMT	获取价格	Flash, 256KX16, 70ns, PDSO48
F49L400UA-90T	ESMT	获取价格	4 Mbit (512K x 8/256K x 16) 3V Only CMOS Flash Memory
F49L400UA-90TG	ESMT	获取价格	Flash, 256KX16, 90ns, PDSO48
F49L800BA	ESMT	获取价格	8 Mbit (1M x 8/512K x 16) 3V Only CMOS Flash Memory
F49L800BA-70T	ESMT	获取价格	8 Mbit (1M x 8/512K x 16) 3V Only CMOS Flash Memory
F49L800BA-70TG	ESMT	获取价格	8 Mbit (1M x 8/512K x 16) 3V Only CMOS Flash Memory
F49L800BA-70TIG	ESMT	获取价格	8 Mbit (1M x 8/512K x 16) 3V Only CMOS Flash Memory
F49L800BA-90T	ESMT	获取价格	8 Mbit (1M x 8/512K x 16) 3V Only CMOS Flash Memory
F49L800BA-90TG	ESMT	获取价格	8 Mbit (1M x 8/512K x 16) 3V Only CMOS Flash Memory
F49L800BA-90TIG	ESMT	获取价格	8 Mbit (1M x 8/512K x 16) 3V Only CMOS Flash Memory

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