EFST
F49L400UA/F49L400BA
4 Mbit (512K x 8/256K x 16)
3V Only CMOS Flash Memory
1. FEATURES
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Single supply voltage 3.0V-3.6V
Fast access time: 70/90 ns
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Ready/Busy (RY/BY )
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- RY/
output pin for detection of program or erase
BY
operation completion
End of program or erase detection
- Data polling
- Toggle bits
Hardware reset
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524,288 x 8 / 262,144 x 16 switchable by BYTE pin
Compatible with JEDEC standard
- Pin-out, packages and software commands
compatible with single-power supply Flash
Low power consumption
- 7mA typical active current
- 25uA typical standby current
100,000 program/erase cycles typically
Command register architecture
- Byte programming (9us typical)
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- Hardware pin(
RESET
to the read mode
) resets the internal state machine
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Sector Protection /Unprotection
- Hardware Protect/Unprotect any combination of sectors
from a program or erase operation.
Low VCC Write inhibit is equal to or less than 2.0V
Boot Sector Architecture
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- Sector Erase(sector structure: one 16 KB, two 8 KB,
one 32 KB, and seven 64 KB)
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Auto Erase (chip & sector) and Auto Program
- Any combination of sectors can be erased
concurrently; Chip erase also provided.
- Automatically program and verify data at specified
address
- U = Upper Boot Sector
- B = Bottom Boot Sector
Packages available:
- 48-pin TSOPI
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Erase Suspend/Erase Resume
- Suspend or Resume erasing sectors to allow the
read/program in another sector
2. ORDERING INFORMATION
Part No
Boot
Speed
Package
Part No
Boot
Speed
Package
F49L400UA-70T
F49L400BA-70T
Upper
70 ns
70 ns
TSOPI
TSOPI
F49L400UA-90T
F49L400BA-90T
Upper
90 ns
90 ns
TSOPI
TSOPI
Bottom
Bottom
3. GENERAL DESCRIPTION
The F49L400UA/F49L400BA is a 4 Megabit, 3V only
CMOS Flash memory device organized as 512K bytes of
8 bits or 256K words of 16bits. This device is packaged in
standard 48-pin TSOP. It is designed to be programmed
and erased both in system and can in standard EPROM
programmers.
The F49L400UA/F49L400BA features a sector erase
architecture. The device memory array is divided into one
16 Kbytes, two 8 Kbytes, one 32 Kbytes, and seven 64
Kbytes. Sectors can be erased individually or in groups
without affecting the data in other sectors. Multiple-sector
erase and whole chip erase capabilities provide the
flexibility to revise the data in the device.
With access times of 70 ns and 90 ns, the
F49L400UA/F49L400BA allows the operation of
high-speed microprocessors. The device has separate
The sector protect/unprotect feature disables both
program and erase operations in any combination of the
sectors of the memory. This can be achieved in-system or
via programming equipment.
chip enable
, write enable
, and output enable
WE
CE
controls. EFST's memory devices reliably store
OE
memory data even after 100,000 program and erase
cycles.
A low VCC detector inhibits write operations on loss of
power. End of program or erase is detected by the
Ready/Busy status pin, Data Polling of DQ7, or by the
Toggle Bit I feature on DQ6. Once the program or erase
cycle has been successfully completed, the device
internally resets to the Read mode.
The F49L400UA/F49L400BA is entirely pin and
command set compatible with the JEDEC standard for 4
Megabit Flash memory devices. Commands are written to
the command register using standard microprocessor
write timings.
Elite Flash Storage Technology Inc.
Publication Date : Sep. 2006
Revision: 1.1
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