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F49L320BA-90TG PDF预览

F49L320BA-90TG

更新时间： 2024-11-27 06:58:39
品牌 Logo 应用领域
晶豪 - ESMT 闪存
页数 文件大小 规格书
55页 541K
描述
32 Mbit (4M x 8/2M x 16) 3V Only CMOS Flash Memory

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中文翻译

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F49L320BA-90TG 技术参数

生命周期：Obsolete零件包装代码：TSOP1
包装说明：12 X 20 MM, LEAD FREE, TSOP1-48针数：48
Reach Compliance Code：unknownECCN代码：3A991.B.1.A
HTS代码：8542.32.00.51风险等级：5.78
最长访问时间：90 ns备用内存宽度：8
JESD-30 代码：R-PDSO-G48长度：18.4 mm
内存密度：33554432 bit内存集成电路类型：FLASH
内存宽度：16功能数量：1
端子数量：48字数：2097152 words
字数代码：2000000工作模式：ASYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：2MX16封装主体材料：PLASTIC/EPOXY
封装代码：TSOP1封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE并行/串行：PARALLEL
编程电压：3 V认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
宽度：12 mmBase Number Matches：1

F49L320BA-90TG 数据手册

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ESMT  
F49L320UA/F49L320BA  
32 Mbit (4M x 8/2M x 16)  
3V Only CMOS Flash Memory  
1. FEATURES  
z
Single supply voltage 2.7V-3.6V  
Fast access time: 70/90 ns  
z
Ready/Busy (RY/BY )  
- RY/BY output pin for detection of program or erase operation  
z
z
z
4,194,304x8 / 2,097,152x16 switchable by BYTE pin  
Compatible with JEDEC standard  
- Pin-out, packages and software commands compatible with  
single-power supply Flash  
Low power consumption  
- 20mA typical active current  
- 25uA typical standby current  
100,000 program/erase cycles typically  
20 Years Data Retention  
completion  
End of program or erase detection  
- Data polling  
- Toggle bits  
Hardware reset  
- Hardware pin (  
the read mode  
Sector Protection /Unprotection  
- Hardware Protect/Unprotect any combination of sectors from  
a program or erase operation.  
z
z
z
) resets the internal state machine to  
RESET  
z
z
z
Command register architecture  
- Byte Word Programming (9μs/11μs typical)  
- Byte Mode : eight 8KB, sixty three 64KB sectors.  
- Word Mode : eight 4K word, sixty-three 32 K word sectors.  
Auto Erase (chip & sector) and Auto Program  
- Any combination of sectors can be erased concurrently;  
Chip erase also provided.  
- Automatically program and verify data at specified address  
Erase Suspend/Erase Resume  
- Suspend or Resume erasing sectors to allow the  
read/program in another sector  
z
z
Low VCC Write inhibit is equal to or less than 2.0V  
Boot Sector Architecture  
- U = Upper Boot Block  
- B = Bottom Boot Block  
Packages available:  
z
z
z
- 48-pin TSOPI  
- All Pb-free products are RoHS-Compliant  
CFI (Common Flash Interface) complaint  
- Provides device-specific information to the system, allowing  
host software to easily reconfigure to different Flash devices.  
z
z
Secured Silicon Sector  
- 128word sector for permanent, secure identification through  
an 8- word random Electronic Serial Number  
- May be programmed and locked at the factory or by the  
customer  
-
-
- Accessible through a command sequence.  
2. ORDERING INFORMATION  
Part No  
Boot  
Speed Package Comments  
Part No  
F49L320UA-90TG  
F49L320BA-90TG Bottom  
Boot  
Upper  
Speed Package Comments  
F49L320UA-70TG  
F49L320BA-70TG Bottom  
Upper  
70 ns  
70 ns  
TSOPI  
TSOPI  
Pb-free  
Pb-free  
90 ns  
90 ns  
TSOPI  
TSOPI  
Pb-free  
Pb-free  
3. GENERAL DESCRIPTION  
The F49L320UA/F49L320BA is a 32 Megabit, 3V only CMOS  
Flash memory device organized as 4M bytes of 8 bits or 2M  
words of 16bits. This device is packaged in standard 48-pin  
TSOP. It is designed to be programmed and erased both in  
system and can in standard EPROM programmers.  
byte mode. The device memory array is divided into eight 4K  
word, sixty-three 32K word sectors for word mode. Sectors can  
be erased individually or in groups without affecting the data in  
other sectors. Multiple-sector erase and whole chip erase  
capabilities provide the flexibility to revise the data in the  
device.  
With access times of 70 ns and 90 ns, the  
F49L320UA/F49L320BA allows the operation of high-speed  
The sector protect/unprotect feature disables both program and  
erase operations in any combination of the sectors of the  
memory. This can be achieved in-system or via programming  
equipment.  
microprocessors. The device has separate chip enable  
, write  
CE  
controls. ESMT’s memory  
enable  
, and output enable  
OE  
WE  
devices reliably store memory data even after 100,000 program  
and erase cycles.  
A low VCC detector inhibits write operations on loss of power.  
End of program or erase is detected by the Ready/Busy status  
pin, Data Polling of DQ7, or by the Toggle Bit I feature on DQ6.  
Once the program or erase cycle has been successfully  
completed, the device internally resets to the Read mode. The  
command register using standard microprocessor write  
timings.  
The F49L320UA/F49L320BA is entirely pin and command set  
compatible with the JEDEC standard for 32 Megabit Flash  
memory devices. Commands are written to  
The F49L320UA/F49L320BA features a sector erase architecture.  
The device array is divided into eight 8KB, sixty-three 64KB for  
Elite Semiconductor Memory Technology Inc.  
Publication Date : Sep. 2008  
Revision: 1.1  
1/55  
1234567...55

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