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F4508-1.800MHZ PDF预览

F4508-1.800MHZ

更新时间: 2024-11-28 10:51:31
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FOX /
页数 文件大小 规格书
2页 499K
描述
Oscillator, 1.8MHz Min, 125MHz Max, 1.8MHz Nom

F4508-1.800MHZ 数据手册

 浏览型号F4508-1.800MHZ的Datasheet PDF文件第2页 
HCMOS, 7.5x5mm, 1.8V, SMD Oscillator  
RoHS & REACH Compliant  
Model: F4500 SERIES  
Rev. 9/17/2012  
http://www.foxonline.com/need_a_sample.htm  
Page 1 of 2  
FEATURES  
1.8V Operation  
• HCMOS Output  
• Low Power Consumption  
• Standby Function  
• Tape and Reel (2,000 pcs. STD)  
• PART ꢀUMbER SELECTIOꢀ  
Model  
Operating  
Frequency  
Frequency  
Part Number  
Stability1  
Number  
Temperature (ºC) Range (MHz)  
F4500  
F4500R  
F4505  
F4505R  
F4506  
F4506R  
F4508  
-10 ~ +70  
-40 ~ +85  
-10 ~ +70  
-40 ~ +85  
-10 ~ +70  
-40 ~ +85  
-10 ~ +70  
1.800 ~ 160.000  
1.800 ~ 160.000  
1.800 ~ 160.000  
1.800 ~ 160.000  
1.800 ~ 160.000  
1.800 ~ 160.000  
1.800 ~ 125.000  
±100PPM  
±100PPM  
±50PPM  
±50PPM  
±25PPM  
±25PPM*  
±20PPM*  
528-Frequency-xxxxx  
529-Frequency-xxxxx  
530-Frequency-xxxxx  
531-Frequency-xxxxx  
532-Frequency-xxxxx  
533-Frequency-xxxxx  
534-Frequency-xxxxx  
• ELECTRICAL CHARACTERISTICS  
MAX (unless otherwise noted)  
PARAMETERS  
Frequency Range (Fo)  
Storage Temperature Range (Tstg)  
1.800 ~ 160.000 MHz  
-55ºC ~ +125ºC  
1.8V ± 5%  
Supply Voltage  
Input Current  
(Vdd)  
(Idd)  
1.000 ~ 32.100 MHz  
7mA  
32.100+ ~ 70.000 MHz  
15mA  
Output Symmetry (50% Vdd)  
Rise Time (20% ~ 80% Vdd) (Tr)  
1.800 ~ 32.100 MHz  
40% ~ 60%  
5nS  
32.100+ ~ 70.000 MHz  
3.5nS  
Fall Time (80% ~ 20% Vdd) (Tf)  
1.800 ~ 32.100 MHz  
5nS  
32.100+ ~ 70.000 MHz  
3.5nS  
Output Voltage  
(Vol)  
(Voh)  
(Iol)  
(Ioh)  
20% Vdd  
80% Vdd Min  
2mA Min  
2mA Min  
15pF  
Output Current  
Output Load  
(HCMOS)  
Standby Current  
Start-up Time  
10µA  
10mS  
300nS  
10mS  
(Ts)  
Output Disable Time 2  
Output Enable Time 2  
1 Inclusive of 25ºC tolerance, operating temperature range, input voltage change, load change, aging,  
shock, and vibration. *Excludes Shock/Vibration  
2 An internal pullup resistor from pin 1 to pin 4 allows active output if pin 1 is left open.  
Note: A 0.01µF bypass capacitor should be placed between VDD (Pin 4) and GND (Pin 2) to  
minimize power supply line noise.  
Drawing is for reference to critical specifications defined by size measurements.  
Certain non-critical visual attributes, such as side castellations, reference pin shape, etc. may vary.  
All specifications subject to change without notice.  
All dimensions are in millimeters.  
• EꢀAbLE / DISAbLE FUꢀCTIOꢀ  
INH (Pin 1)  
OPEN 2  
OUTPUT (Pin 3)  
ACTIVE  
'1' Level Vih 70% Vdd  
'0' Level Vil 30% Vdd  
ACTIVE  
High Z  
FOXElectronics 5570 Enterprise Parkway Fort Myers, Florida 33905 USA +1.239.693.0099 FAX +1.239.693.1554 www.foxonline.com  
EMEA Tel: +44 .1283.568153 | Canada +1.888.438.2369 | Asia Hong Kong Tel: +852.2854.4285 | Japan Tel: +81.3.3374.2079  
© 2012 FOX ELECTRONICS | ISO9001:2008 Certified  

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