Datasheet > F4506R-70.000-DM0

F4506R-70.000-DM0

更新时间： 2024-11-28 10:00:43

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FOX		/
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1页	82K
描述
Oscillator

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技术参数
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F4506R-70.000-DM0 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	compliant	风险等级：	5.57
JESD-609代码：	e4	端子面层：	Gold (Au) - with Nickel (Ni) barrier
Base Number Matches：	1

F4506R-70.000-DM0 数据手册

1.8V HCMOS SMD OSCILLATOR WITH STANDBY

MODEL: F4500 SERIES

FEATURES

• 1.8V Operation

• HCMOS Output

• Low Power Consumption

• Standby Function

• Tape and Reel (2,000 pcs. STD)

Learn more about:

Part Marking Identification

Tape and Reel Specification

• PART NUMBER SELECTION^{Learn More - Internet Required}

Frequency

Operating

Frequency

Model

Number

F4500

Part Number

Stability¹Temperature (ºC) Range (MHz)

Mechanical Specification

±100PPM

F4500R ±100PPM

-10 ~ +70

-40 ~ +85

-10 ~ +70

-40 ~ +85

-10 ~ +70

-40 ~ +85

-10 ~ +70

1.800 ~ 70.000

Internet required

528-Frequency-xxxxx

529-Frequency-xxxxx

530-Frequency-xxxxx

531-Frequency-xxxxx

532-Frequency-xxxxx

533-Frequency-xxxxx

534-Frequency-xxxxx

F4505

F4505R

F4506

±50PPM

±25PPM

F4506R ±25PPM*

F4508 ±20PPM*

• ELECTRICAL CHARACTERISTICS

MAX (unless otherwise noted)

1.800 ~ 70.000 MHz

-55ºC ~ +125ºC

PARAMETERS

Frequency Range (FO)

Storage Temperature Range (TSTG)

Supply Voltage

Input Current

(V^DD)

(I^DD)

1.8V ± 5%

1.000 ~ 32.100 MHz

32.100+ ~ 70.000 MHz

7mA

15mA

Output Symmetry (50% V^DD)

Rise Time (20% ~ 80% VDD) (TR)

1.800 ~ 32.100 MHz

40% ~ 60%

5nS

32.100+ ~ 70.000 MHz

3.5nS

Fall Time (80% ~ 20% V^DD) (TF)

1.800 ~ 32.100 MHz

32.100+ ~ 70.000 MHz

5nS

3.5nS

Output Voltage

(V^OL)

(VOH)

(IOL)

(IOH)

(HCMOS)

20% V^DD

80% VDD Min

2mA Min

15pF

Output Current

Output Load

Standby Current

Start-up Time

10µA

10mS

300nS

10mS

(T^S)

Output Disable Time ²

Output Enable Time ²

¹Inclusive of 25ºC tolerance, operating temperature range, input voltage change, load change, aging,

shock, and vibration. *Excludes Shock/Vibration

²An internal pullup resistor from pin 1 to pin 4 allows active output if pin 1 is left open.

Note: A 0.01µF bypass capacitor should be placed between VDD (Pin 4) and GND (Pin 2) to

minimize power supply line noise.

All specifications subject to change without notice. Rev. 6/1/04

All dimensions are in millimeters.

• ENABLE / DISABLE FUNCTION

INH (Pin 1)

OUTPUT (Pin 3)

ACTIVE

OPEN ²

'1' Level VIH ≥ 70% VDD

'0' Level VIL ≤ 30% VDD

ACTIVE

High Z

See page 60 for tape and reel specifications.

FOXElectronics 5570 Enterprise Parkway Fort Myers, Florida 33905 USA +1(239)693-0099 FAX +1(239)693-1554 http://www.foxonline.com

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