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F28M35H52C-Q1 PDF预览

F28M35H52C-Q1

更新时间: 2024-11-20 02:45:47
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德州仪器 - TI 微控制器
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226页 4723K
描述
F28M35x Concerto™ Microcontrollers

F28M35H52C-Q1 数据手册

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F28M35H52C, F28M35H52C-Q1, F28M35H22C  
F28M35M52C, F28M35M22C, F28M35E20B  
SPRS742L – JUNE 2011 – REVISED FEBRUARY 2021  
F28M35x ConcertoMicrocontrollers  
– Embedded memory  
1 Features  
Up to 512KB of flash (ECC)  
Master Subsystem — Arm® Cortex®-M3  
Up to 36KB of RAM (ECC or parity)  
Up to 64KB of shared RAM  
2KB of IPC Message RAM  
– Up to 100 MHz  
– Embedded memory  
Up to 512KB of flash (ECC)  
– IEEE-754 single-precision Floating-Point Unit  
Up to 32KB of RAM (ECC or parity)  
Up to 64KB of shared RAM  
2KB of IPC Message RAM  
(FPU)  
– Viterbi, Complex Math, CRC Unit (VCU)  
– Serial Communications Interface (SCI)  
– Five Universal Asynchronous Receiver/  
Transmitters (UARTs)  
– SPI  
– I2C  
– Four Synchronous Serial Interfaces (SSIs) and  
a Serial Peripheral Interface (SPI)  
– Two Inter-integrated Circuits (I2Cs)  
– Universal Serial Bus On-the-Go (USB-OTG) +  
PHY  
– 10/100 ENET 1588 MII  
– Two Controller Area Network, D_CAN, modules  
(pin-bootable)  
– 32-channel Micro Direct Memory Access  
(µDMA)  
– Dual security zones (128-bit password per  
zone)  
– External Peripheral Interface (EPI)  
– Micro Cyclic Redundancy Check (µCRC)  
module  
– Four general-purpose timers  
– Two watchdog timer modules  
– Three external interrupts  
– Endianness: little endian  
Clocking  
– On-chip crystal oscillator and external clock  
input  
– Dynamic Phase-Locked Loop (PLL) ratio  
changes supported  
1.2-V digital, 1.8-V analog, 3.3-V I/O design  
Interprocessor Communications (IPC)  
– 32 handshaking channels  
– Four channels generate IPC interrupts  
– Can be used to coordinate transfer of data  
through IPC Message RAMs  
– 6-channel Direct Memory Access (DMA)  
– Nine Enhanced Pulse Width Modulator (ePWM)  
modules  
18 outputs (16 high-resolution)  
– Six 32-bit Enhanced Capture (eCAP) modules  
– Three 32-bit Enhanced Quadrature Encoder  
Pulse (eQEP) modules  
– Multichannel Buffered Serial Port (McBSP)  
– EPI  
– One security zone (128-bit password)  
– Three 32-bit timers  
– Endianness: little endian  
Analog Subsystem  
– Dual 12-bit Analog-to-Digital Converters  
(ADCs)  
– Up to 2.88 MSPS  
– Up to 20 channels  
– Four Sample-and-Hold (S/H) circuits  
– Up to six comparators with 10-bit Digital-to-  
Analog Converter (DAC)  
Package  
– 144-Pin RFP PowerPADThermally Enhanced  
Thin Quad Flatpack (HTQFP)  
Temperature options:  
T: 40°C to 105°C Junction  
– S: –40°C to 125°C Junction  
– Q: –40°C to 125°C Free-Air  
(AEC Q100 qualification for automotive  
applications)  
2 Applications  
Up to 74 individually programmable, multiplexed  
General-Purpose Input/Output (GPIO) pins  
– Glitch-free I/Os  
Control Subsystem — TMS320C28x 32-bit CPU  
– Up to 150 MHz  
Automated sorting equipment  
CNC control  
Central inverter  
String inverter  
AC drive control module  
– C28x core hardware built-in self-test  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 

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