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F25L32QA-86PAG

更新时间： 2024-01-28 21:59:45
品牌 Logo 应用领域
晶豪 - ESMT 闪存
页数 文件大小 规格书
42页 484K
描述
3V Only 32 Mbit Serial Flash Memory with Dual and Quad

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F25L32QA-86PAG 数据手册

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ESMT  
(Preliminary)  
F25L32QA  
Flash  
3V Only 32 Mbit Serial Flash Memory  
with Dual and Quad  
„ FEATURES  
y
y
Single supply voltage 2.7~3.6V  
Standard, Dual and Quad SPI  
y
Erase  
- Chip erase time 25 sec (typical)  
- Block erase time 1 sec (typical)  
- Sector erase time 90 ms (typical)  
y
y
Speed  
- Read max frequency: 33MHz  
- Fast Read max frequency: 50MHz / 86MHz/ 100MHz  
- Fast Read Dual/Quad max frequency: 50MHz / 100MHz  
(100MHz / 172MHz/ 200MHz equivalent Dual SPI;  
200MHz / 344MHz/ 400MHz equivalent Quad SPI)  
y
y
Page Programming  
- 256 byte per programmable page  
Auto Address Increment (AAI) WORD Programming  
- Decrease total chip programming time over Byte Program  
operations  
Low power consumption  
- Active current: 35 mA  
- Standby current: 30μ A  
y
y
Lockable 2K bytes OTP security sector  
SPI Serial Interface  
- SPI Compatible: Mode 0 and Mode 3  
- Deep Power Down current: 5μ A  
y
y
Reliability  
y
y
End of program or erase detection  
Write Protect ( WP )  
- 100,000 typical program/erase cycles  
- 20 years Data Retention  
Program  
y
y
Hold Pin (HOLD )  
- Byte programming time: 7μ s (typical)  
All Pb-free products are RoHS-Compliant  
- Page programming time: 1.5 ms (typical)  
„ ORDERING INFORMATION  
Product ID  
Speed  
50MHz  
86MHz  
Package  
8 lead SOIC  
8 lead SOIC  
Comments  
Pb-free  
Pb-free  
Pb-free  
Pb-free  
Pb-free  
Pb-free  
F25L32QA –50PAG  
F25L32QA –86PAG  
F25L32QA –100PAG  
F25L32QA –50PHG  
F25L32QA –86PHG  
F25L32QA –100PHG  
200mil  
200mil  
200mil  
100MHz 8 lead SOIC  
50MHz 16 lead SOIC 300mil  
86MHz 16 lead SOIC 300mil  
100MHz 16 lead SOIC 300mil  
„ GENERAL DESCRIPTION  
The F25L32QA is a 32Megabit, 3V only CMOS Serial Flash  
memory device. The device supports the standard Serial  
Peripheral Interface (SPI), and a Dual/Quad SPI. ESMT’s  
memory devices reliably store memory data even after 100,000  
programming and erase cycles.  
The device features sector erase architecture. The memory array  
is divided into 1024 uniform sectors with 4K byte each; 64  
uniform blocks with 64K byte each. Sectors can be erased  
individually without affecting the data in other sectors. Blocks can  
be erased individually without affecting the data in other blocks.  
Whole chip erase capabilities provide the flexibility to revise the  
data in the device. The device has Sector, Block or Chip Erase  
but no page erase.  
The memory array can be organized into 16,384 programmable  
pages of 256 byte each. 1 to 256 byte can be programmed at a  
time with the Page Program instruction. The device also can be  
programmed to decrease total chip programming time with Auto  
Address Increment (AAI) programming.  
The sector protect/unprotect feature disables both program and  
erase operations in any combination of the sectors of the  
memory.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Jan. 2009  
Revision: 0.2  
1/42  
1234567...42

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