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F25L32PA-100PAG PDF预览

F25L32PA-100PAG

更新时间: 2024-09-24 06:58:39
品牌 Logo 应用领域
晶豪 - ESMT 闪存存储
页数 文件大小 规格书
36页 373K
描述
3V Only 32 Mbit Serial Flash Memory with Dual

F25L32PA-100PAG 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
零件包装代码:SOIC包装说明:SOP,
针数:8Reach Compliance Code:unknown
ECCN代码:3A991.B.1.AHTS代码:8542.32.00.51
风险等级:5.74Is Samacsys:N
Base Number Matches:1

F25L32PA-100PAG 数据手册

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ESMT  
F25L32PA  
Flash  
3V Only 32 Mbit Serial Flash Memory with Dual  
„ FEATURES  
y
y
Single supply voltage 2.7~3.6V  
Standard and Dual SPI  
y
y
Erase  
- Chip erase time 25 sec (typical)  
- Block erase time 1 sec (typical)  
- Sector erase time 90 ms (typical)  
y
Speed  
- Read max frequency: 33MHz  
- Fast Read max frequency: 50MHz / 86MHz / 100MHz  
- Fast Read Dual max frequency: 50MHz / 86MHz / 100MHz  
(100MHz / 172MHz / 200MHz equivalent Dual SPI)  
Page Programming  
- 256 byte per programmable page  
y
y
Lockable 2K bytes OTP security sector  
y
Low power consumption  
- Active current: 35 mA  
- Standby current: 30μ A  
SPI Serial Interface  
- SPI Compatible: Mode 0 and Mode 3  
- Deep Power Down current: 5μ A  
y
y
End of program or erase detection  
Write Protect ( WP )  
y
y
Reliability  
- 100,000 typical program/erase cycles  
- 20 years Data Retention  
y
y
Hold Pin (HOLD )  
Program  
All Pb-free products are RoHS-Compliant  
- Byte programming time: 7μ s (typical)  
- Page programming time: 1.5 ms (typical)  
„ ORDERING INFORMATION  
Product ID  
Speed  
Package  
8 lead SOIC  
8 lead SOIC  
Comments  
Pb-free  
Pb-free  
Pb-free  
Pb-free  
Pb-free  
Pb-free  
F25L32PA –50PAG  
F25L32PA –86PAG  
F25L32PA –100PAG  
F25L32PA –50PHG  
F25L32PA –86PHG  
F25L32PA –100PHG  
50MHz  
86MHz  
200mil  
200mil  
200mil  
100MHz 8 lead SOIC  
50MHz 16 lead SOIC 300mil  
86MHz 16 lead SOIC 300mil  
100MHz 16 lead SOIC 300mil  
„ GENERAL DESCRIPTION  
The F25L32PA is a 32Megabit, 3V only CMOS Serial Flash  
memory device. The device supports the standard and Dual  
Serial Peripheral Interface (SPI). ESMT’s memory devices  
reliably store memory data even after 100,000 programming and  
erase cycles.  
is divided into 1024 uniform sectors with 4K byte each; 64  
uniform blocks with 64K byte each. Sectors can be erased  
individually without affecting the data in other sectors. Blocks can  
be erased individually without affecting the data in other blocks.  
Whole chip erase capabilities provide the flexibility to revise the  
data in the device. The device has Sector, Block or Chip Erase  
but no page erase.  
The memory array can be organized into 16,384 programmable  
pages of 256 byte each. 1 to 256 byte can be programmed at a  
time with the Page Program instruction.  
The sector protect/unprotect feature disables both program and  
erase operations in any combination of the sectors of the  
memory.  
The device features sector erase architecture. The memory array  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Mar. 2009  
Revision: 1.0  
1/36  

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