Sampling IF Receiver 1710MHz to
2050MHz
F0552
Datasheet
DESCRIPTION
FEATURES
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Dual Channel for Diversity / MIMO Systems
This document describes the specifications for the F0552
1710MHz to 2050MHz dual path Sampling Intermediate
Frequency (SIF) Receiver ideal for Multi-mode, Multi-
carrier BaseStation Receivers. Refer to the Part # Matrix
below describing the frequency coverage of the complete
series. This series of devices covers all UTRA bands up
to 2.7GHz and offers significantly better Noise and
Distortion performance than currently available solutions.
IF frequencies up to 450 MHz are supported.
Combines FlatNoiseTM and Zero-DistortionTM
technology
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•
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29dB Total Power Gain
47dB gain control range
1 dB Gain Steps
Ultra linear +45dBm IP3O
Low NF: 9.6dB at GMAX
50Ω input impedance
Matched to 100Ω differential output impedance
Ultra high +19.8dBm P1dBo
Independent channel standby mode
Constant LO impedance in STBY mode
6-bit parallel control
60MHz to 450MHz IF frequency range
Excellent 2x2, 3x3, IM2, 2nd Harmonic
Rejection
The F0552 SIF provides 29dB gain and offers 47dB
gain adjustment in 1dB steps designed to operate with
a single 5V supply. Nominally, the device offers +45
dBm Output IP3 using 450mA of ICC. Alternately one
can configure the device in low current (LC) mode to
reduce power consumption to < 1.9 Watts.
This device is packaged in a 10 x 10 mm 68-pin Thin
QFN with 50 ohm single-ended RF input and 200 ohm
differential IF output impedances for ease of integration
into the receiver lineup. The EvKit is configured to
match the 200 ohm differential IF output to 100 ohms
differential for a broad range of IF center frequencies
per the application drawings.
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ICC = 450mA STD Mode, 375mA LC Mode
10 x 10 mm 68-pin VFQFPN package
DEVICE BLOCK DIAGRAM
COMPETITIVE ADVANTAGE
RFIN_A
IFOUT_A+
IFOUT_A-
Renesas’ Zero-DistortionTM mixer in combination with
interstage filtering and Renesas’ proprietary FlatNoiseTM
DVGA improves system SNR to the point where the
external SAW filter can be eliminated. Both IP3O and NF
are kept virtually flat while gain is backed off, enhancing
SNR significantly under high level interferer conditions,
and greatly benefiting 2G/3G/4G Multi-Carrier IF
6
2
6
GAIN_A[0:5]
TDD (STBY)
GAIN_B[0:5]
LC_Mode
Iset
RF VCO
Decode
Logic
Bias
Control
2
IFOUT_B+
RFIN_B
IFOUT_B-
sampling receivers. In addition, total power consumption
is reduced by ~35% compared to conventional solutions.
No external SAW is needed
PART# MATRIX
Reduced Power Consumption by 35%
Part#
F0502
F0552
F0562
RF freq
range
UTRA bands
IF freq
range
Typ.
Gain
Injection
NF and OIP3 virtually flat for first 17 dB gain
reduction
5,6,8,12,13,14,17
18,19,20
Low &
High Side
698 - 915
1710 - 2050
2300 – 2700
60 – 300
60 – 450
60 – 450
29
29
29
1,2,3,4,9,10,23,
25,33,34,35,36,
37,39
Low &
High Side
The fast-settling, parallel mode gain step of 1.0dB
coupled with the excellent differential non-linearity allow
for SNR to be maximized further by targeting the
minimum necessary gain in small, accurate increments.
The matched output does not require a terminating
resistor, thus the gain and distortion performance are
preserved when driving Bandpass Anti-Alias filters.
Low &
High Side
7,38,40,41
FlatNoiseTM, Zero-DistortionTM, SIF Rx
1
February 9, 2022
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