Quad Parametric Measurement Unit with
Integrated 16-Bit Level Setting DACs
AD5522
FEATURES
APPLICATIONS
Quad parametric measurement unit (PMU)
FV, FI, FN (high-Z), MV, MI functions
4 programmable current ranges (internal RSENSE
±± ꢀA, ±20 ꢀA, ±200 ꢀA, and ±2 mA
Automated test equipment (ATE)
Per-pin parametric measurement unit
Continuity and leakage testing
Device power supply
)
1 programmable current range up to ±80 mA (external RSENSE
22.± V FV range with asymmetrical operation
Integrated 16-bit DACs provide programmable levels
Gain and offset correction on chip
)
Instrumentation
Source measure unit (SMU)
Precision measurement
Low capacitance outputs suited to relayless systems
On-chip comparators per channel
FI voltage clamps and FV current clamps
Guard drive amplifier
System PMU connections
Programmable temperature shutdown
SPI- and LVDS-compatible interfaces
Compact 80-lead TQFP with exposed pad (top or bottom)
FUNCTIONAL BLOCK DIAGRAM
DVCC
DGND
CCOMP[0:3]
SYS_FORCE
SYS_SENSE
AVSS
AVDD
AGND
EN
EXTFOH[0:3]
VREF
×4
16-BIT
CLH DAC
16
16
16
16
CFF[0:3]
FOH[0:3]
X1 REG
M REG
C REG
CLH
SW3
X2 REG
×2
REFGND
×2
OFFSET DAC
INTERNAL RANGE SELECT
(±5µA, ±20µA, ±200µA, ±2mA)
16
–
+
60Ω
1kΩ
FIN
16
16
×6
SW1
16-BIT
FIN DAC
X1 REG
M REG
C REG
16
+
FORCE
AMPLIFIER
AGND
X2 REG
MEASVH
(Hi-Z)
×6
SW5
R
–
SENSE
SW2
4kΩ
SW6
SW4
16-BIT
CLL DAC
16
16
16
16
EXTMEASIH[0:3]
EXTMEASIL[0:3]
CLL
+
X1 REG
M REG
C REG
X2 REG
VMID TO
CENTER
I RANGE
×2
+
–
EXTERNAL
SW8
SW10
×2
R
SENSE
2kΩ
(CURRENTS
UP TO ±80mA)
SW7
×5 or ×10
MEASOUT
MUX AND GAIN
×1/×0.2
+
–
–
MEASOUT[0:3]
AGND
SW9
4kΩ
SW12
TEMP
SENSOR
MEASURE
CURRENT
IN-AMP
16
16
16
SW11
MEASVH[0:3]
GUARD[0:3]
×6
X1 REG
M REG
C REG
×6
+
–
16-BIT
CPH DAC
16
X2 REG
SW13
DUT
AGND
+
GUARDIN[0:3]/
DUTGND[0:3]
SW16
GUARD AMP
×1
16
16
16
DUTGND
CPH
–
×6
+
–
×6
–
SW14
CPL
16-BIT
DUTGND
X1 REG
M REG
C REG
16
CPL DAC
X2 REG
MEASURE
VOLTAGE
IN-AMP
+
–
+
SW15
COMPARATOR
10kΩ
AGND
16-BIT
OFFSET
DAC
TO ALL DAC
OUTPUT
AMPLIFIERS
TO
MEASOUT
MUX
16
TEMP
SENSOR
TMPALM
CGALM
16
SERIAL
INTERFACE
CLAMP AND
GUARD
ALARM
POWER-ON
RESET
RESET SDO SCLK SDI SYNC BUSY LOAD SPI/ CPOL0/ CPOH0/
LVDS SCLK
SDI
CPOL1/ CPOH1/
SYNC SDO
CPOL2/ CPOH2/ CPOL3/ CPOH3/
CPO0 CPO1 CPO2 CPO3
Figure 1.
Rev. A
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rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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