Dual 12-Bit, High Bandwidth, Multiplying DAC
with 4-Quadrant Resistors and Serial Interface
AD5415
FEATURES
GENERAL DESCRIPTION
On-chip 4-quadrant resistors allow flexible output ranges
10 MHz multiplying bandwidth
50 MHz serial interface
2.5 V to 5.5 V supply operation
10 V reference input
The AD54151 is a CMOS 12-bit, dual-channel, current output
digital-to-analog converter. This device operates from a 2.5 V to
5.5 V power supply, making it suited to battery-powered appli-
cations as well as many other applications.
The applied external reference input voltage (VREF) determines
the full-scale output current. An integrated feedback resistor
(RFB) provides temperature tracking and full-scale voltage
output when combined with an external current-to-voltage
precision amplifier. In addition, this device contains all the
4-quadrant resistors necessary for bipolar operation and other
configuration modes.
Extended temperature range: −40°C to +125°C
24-lead TSSOP package
Guaranteed monotonic
Power-on reset
Daisy-chain mode
Readback function
0.5 µA typical current consumption
This DAC utilizes a double-buffered 3-wire serial interface that
is compatible with SPI®, QSPI™, MICROWIRE™, and most DSP
interface standards. In addition, a serial data out pin (SDO)
allows for daisy-chaining when multiple packages are used.
Data readback allows the user to read the contents of the DAC
register via the SDO pin. On power-up, the internal shift
register and latches are filled with zeros, and the DAC outputs
are at zero scale. As a result of manufacture on a CMOS submi-
cron process, this part offers excellent 4-quadrant multiplication
characteristics, with large-signal multiplying bandwidths of
10 MHz.
APPLICATIONS
Portable battery-powered applications
Waveform generators
Analog processing
Instrumentation applications
Programmable amplifiers and attenuators
Digitally controlled calibration
Programmable filters and oscillators
Composite video
Ultrasound
Gain, offset, and voltage trimming
1US Patent Number 5,689,257.
FUNCTIONAL BLOCK DIAGRAM
R3A
R2_3A
R2A
V
A R1A
REF
R3
2R
R2
2R
R
R1
2R
FB
2R
AD5415
V
DD
R
A
FB
SYNC
SCLK
SDIN
I
I
1A
2A
OUT
12-BIT
R-2R DAC A
INPUT
REGISTER
DAC
REGISTER
SHIFT
REGISTER
OUT
SDO
LDAC
I
I
1B
2B
OUT
12-BIT
R-2R DAC B
INPUT
REGISTER
DAC
REGISTER
OUT
POWER-ON
RESET
CLR
GND
R
B
FB
R1
2R
R
FB
2R
R3
2R
R2
2R
R3B
R2_3B
R2B
V
B R1B
REF
Figure 1.
Rev. 0
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