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FLK027XP PDF预览

FLK027XP

更新时间: 2024-01-21 04:49:29
品牌 Logo 应用领域
EUDYNA 晶体晶体管
页数 文件大小 规格书
4页 97K
描述
GaAs FET & HEMT Chips

FLK027XP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Contact Manufacturer零件包装代码:DIE
包装说明:UNCASED CHIP, R-XUUC-N4针数:4
Reach Compliance Code:unknown风险等级:5.32
其他特性:HIGH RELIABILITY配置:SINGLE
最小漏源击穿电压:15 VFET 技术:HIGH ELECTRON MOBILITY
最高频带:KU BANDJESD-30 代码:R-XUUC-N4
元件数量:1端子数量:4
工作模式:DEPLETION MODE封装主体材料:UNSPECIFIED
封装形状:RECTANGULAR封装形式:UNCASED CHIP
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:N-CHANNEL
认证状态:Not Qualified表面贴装:YES
端子形式:NO LEAD端子位置:UPPER
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管元件材料:GALLIUM ARSENIDE
Base Number Matches:1

FLK027XP 数据手册

 浏览型号FLK027XP的Datasheet PDF文件第2页浏览型号FLK027XP的Datasheet PDF文件第3页浏览型号FLK027XP的Datasheet PDF文件第4页 
FLK027XP, FLK027XV  
GaAs FET & HEMT Chips  
FEATURES  
High Output Power: P  
= 24.0dBm(Typ.)  
1dB  
High Gain: G  
High PAE: η  
= 7.0dB(Typ.)  
1dB  
= 32%(Typ.)  
add  
Drain  
Proven Reliability  
Source  
Source  
DESCRIPTION  
The FLK027XP, and FLK027XV chip is a power GaAs FET that is  
designed for general purpose applications in the Ku-Band frequency  
range as it provides superior power, gain, and efficiency.  
Gate  
Fujitsu’s stringent Quality Assurance Program assures the highest  
reliability and consistent performance.  
ABSOLUTE MAXIMUM RATING (Ambient Temperature Ta=25°C)  
Item  
Symbol  
Condition  
Unit  
Rating  
Drain-Source Voltage  
Gate-Source Voltage  
V
DS  
V
GS  
15  
-5  
V
V
P
T
T = 25°C  
c
Total Power Dissipation  
Storage Temperature  
1.88  
W
°C  
°C  
tot  
-65 to +175  
stg  
T
Channel Temperature  
175  
ch  
Fujitsu recommends the following conditions for the reliable operation of GaAs FETs:  
1. The drain-source operating voltage (V ) should not exceed 10 volts.  
DS  
2. The forward and reverse gate currents should not exceed 2.2 and -0.1 mA respectively with  
gate resistance of 2000.  
3. The operating channel temperature (T ) should not exceed 145°C.  
ch  
ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25°C)  
Limit  
Typ.  
Item  
Symbol  
Test Conditions  
Unit  
Min.  
Max.  
150  
V
V
V
I
= 5V, V  
= 0V  
GS  
Saturated Drain Current  
Transconductance  
I
-
-
100  
mA  
DS  
DS  
DS  
DSS  
g
m
-
-3.5  
-
= 5V, I  
= 65mA  
= 5mA  
50  
mS  
V
DS  
Pinch-off Voltage  
V
= 5V, I  
-1.0 -2.0  
p
DS  
Gate Source Breakdown Voltage  
V
-
= -5µA  
-5  
V
GSO  
GS  
Output Power at 1dB  
Gain Compression Point  
P
-
-
23  
24  
dBm  
1dB  
V
= 10V  
DS  
Power Gain at 1dB  
Gain Compression Point  
I
0.6I  
DS  
DSS  
G
6
7
dB  
1dB  
f = 14.5GHz  
η
Power-added Efficiency  
Thermal Resistance  
add  
-
-
32  
40  
-
%
R
Channel to Case  
80  
°C/W  
th  
Note: RF parameter sample size 10pcs. criteria (accept/reject)=(2/3)  
The chip must be enclosed in a hermetically sealed environment for optimum performance and reliability.  
Edition 1.3  
July 1999  
1

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