ZR36011
PRELIMINARY
DIGITAL COLOR SPACE CONVERTER
FEATURES
■ RGB to YCbCr and YCbCr to RGB conversions
■ CyMaYe to YCbCr and YCbCr to CyMaYe conversions
■ Bidirectional data buses for convenient interfacing
■ Pixel rates up to 30 megapixels per second
■ CCIR601 and full range data scaling options
■ Bidirectional shift registers for sync pulse delay matching
■ Compatible with Zoran’s ZR36050 JPEG Image
Compression Processor and ZR36015 Raster to Block
Converter
■ Supports 4:2:2 decimation and interpolation modes, with
■ 100-Pin PQFP package
■ Low power CMOS, 5V
optional filtering
■ Supports 4:1:1 decimation and interpolation with filtering
APPLICATIONS
■ Image processing
■ Image capture and display
■ Image compression
GENERAL DESCRIPTION
The ZR36011 Digital Color Space Convertor performs forward
or inverse conversions between RGB and YCbCr color spaces.
It is intended for use as a building block in systems that require
this function. The direction of the conversion (RGB to YCbCr or
YCbCr to RGB), and all other operating mode options, are deter-
mined by the states of control inputs. The 24-bit RGB and YCbCr
data buses are bidirectional, making for straightforward interfac-
ing when the direction of signal flow is reversible, as in a video
compression and expansion module. Conversion between
CyMaYe (Cyan, Magenta, Yellow) and YCbCr color spaces is
also supported. An additional conversion stage, between RGB
and CyMaYe color spaces, is inserted in this case, thus redefin-
ing the R, G, B pins as Cy, Ma, Ye.
signal ranges conforming to CCIR Recommendation 601, the
other for components occupying the full 8 bit numeric range.
Decimation and interpolation of the color difference signals is
supported. The available modes are 4:4:4 (undecimated), 4:2:2
and 4:1:1. Filtering is optional in the 4:2:2 mode, and is always
performed in the 4:1:1 mode. Other operating modes allow
simple two-to-one compression to be performed by an additional
decimation of the Y, Cb and Cr data, as well as the correspond-
ing decompression by interpolation.
A two-bit bidirectional shift register, with the same number of
stages (eight) as the computation pipeline, is provided. This can
be used as a delay line for synchronization signals, to keep them
synchronized with the data.
The color space conversion coefficients are fixed. One of two
sets of coefficients can be selected: one suitable for component
SIGN
CCIR
BYPASS
SRGB
2
Delay Line
SYC
2
R
Y
8
8
8
8
Color Space
Conversion
G
CB
CR
8
8
B
Bidirectional I/O
Bidirectional I/O
Rounding, Limiting
Decimation
Interpolation
Filtering
CMY
MODE
3
CLK
RST
CHS
OE
Control
DIR
Figure 1. ZR36011 Block Diagram
ZORAN Corporation ■ 1705 Wyatt Drive ■ Santa Clara, CA 95054 ■ (408) 986-1314 ■ FAX (408) 986-1240
September 1993
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