Datasheet > ESDLC8009MP

ESDLC8009MP

更新时间： 2023-12-06 20:08:50

品牌	Logo	应用领域
先科 - SWST		二极管
页数	文件大小	规格书
3页	219K
描述
静电保护二极管

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数据手册

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ESDLC8009MP 数据手册

ESDLC8009MP

ESD Protection Diode

Low Capacitance Array for High Speed Date Lines

I/O

Pin 4

I/O

Pin 1

I/O

Pin 5

I/O

Pin 7

I/O

Pin 2

I/O

Pin 8

I/O

Pin 10

I/O

Pin 11

Features

• Integrated 4 Pairs (8 Lines) high speed date

• Single connect , flow through routing

• Low capacitance

DFN5515-14 Plastic Package

Pin 3, 6, 9, 12, 13, 14

Absolute Maximum Ratings (T_a= 25℃)

Parameter

Symbol

P_PK

Value

Unit

Peak Pulse Power (tp = 8/20 µs)

ESD per IEC 61000-4-2 (Air)

ESD per IEC 61000-4-2 (Contact)

V_ESD

± 20

Operation Temperature Range

Storage Temperature Range

T_opr

T_stg

- 55 to + 125

- 55 to + 150

℃

Characteristics at T_a= 25℃

Parameter

Symbol

V_RWM

Min.

Typ.

Max.

3.3

Unit

Reverse Stand-Off Voltage

at I/O Pin to GND

Reverse Breakdown Voltage

at I_t= 1 mA , I/O Pin to GND

V_(BR)R

I_R

5.5

8.5

0.5

Reverse Current

μA

at V_RWM= 3.3 V, I/O Pin to GND

Clamping Voltage (TLP)

at I_PP= 8 A,

I/O to GND tp = 100 ns, tr = 0.2 ns, t_MEAS=70-90 ns

V_C

Clamping Voltage (TLP)

at I_PP= 16 A,

I/O to GND tp = 100 ns, tr = 0.2 ns, t_MEAS= 70-90 ns

7.3

Junction Capacitance

at V_R= 0 V, f = 1 MHz between I/O Pins and GND

C_j

0.5

0.75

Dynamic Resistance I/O to GND

R_dyn

0.16

Ω

1 / 3

Dated：21/02/2023 Rev：02

12 3

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