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EPM7064BLI44-3 PDF预览

EPM7064BLI44-3

更新时间: 2023-01-02 23:21:07
品牌 Logo 应用领域
英特尔 - INTEL /
页数 文件大小 规格书
66页 962K
描述
EE PLD, 3.5ns, 64-Cell, CMOS, PQCC44, PLASTIC, LCC-44

EPM7064BLI44-3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred包装说明:QCCJ, LDCC44,.7SQ
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.59其他特性:YES
系统内可编程:YESJESD-30 代码:S-PQCC-J44
JESD-609代码:e3JTAG BST:YES
湿度敏感等级:1宏单元数:64
端子数量:44封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC44,.7SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:1.8/3.3,2.5 V
可编程逻辑类型:EE PLD传播延迟:3.5 ns
认证状态:Not Qualified子类别:Programmable Logic Devices
表面贴装:YES技术:CMOS
端子面层:MATTE TIN端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED

EPM7064BLI44-3 数据手册

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MAX 7000B  
Programmable Logic  
Device  
®
September 2005, ver. 3.5  
Data Sheet  
High-performance 2.5-V CMOS EEPROM-based programmable logic  
devices (PLDs) built on second-generation Multiple Array MatriX  
(MAX®) architecture (see Table 1)  
Features...  
Pin-compatible with the popular 5.0-V MAX 7000S and 3.3-V  
MAX 7000A device families  
High-density PLDs ranging from 600 to 10,000 usable gates  
3.5-ns pin-to-pin logic delays with counter frequencies in excess  
of 303.0 MHz  
Advanced 2.5-V in-system programmability (ISP)  
Programs through the built-in IEEE Std. 1149.1 Joint Test Action  
Group (JTAG) interface with advanced pin-locking capability  
Enhanced ISP algorithm for faster programming  
ISP_Done bit to ensure complete programming  
Pull-up resistor on I/O pins during in-system programming  
ISP circuitry compliant with IEEE Std. 1532  
For information on in-system programmable 5.0-V MAX 7000S or 3.3-V  
MAX 7000A devices, see the MAX 7000 Programmable Logic Device Family  
Data Sheet or the MAX 7000A Programmable Logic Device Family Data Sheet.  
f
Table 1. MAX 7000B Device Features  
Feature  
EPM7032B  
EPM7064B  
EPM7128B  
EPM7256B  
EPM7512B  
Usable gates  
Macrocells  
600  
32  
2
1,250  
64  
2,500  
128  
8
5,000  
256  
16  
10,000  
512  
Logic array blocks  
4
32  
Maximum user I/O  
pins  
36  
68  
100  
164  
212  
t
PD (ns)  
SU (ns)  
3.5  
2.1  
3.5  
2.1  
4.0  
2.5  
5.0  
3.3  
5.5  
3.6  
t
tFSU (ns)  
CO1 (ns)  
1.0  
1.0  
1.0  
1.0  
1.0  
t
2.4  
2.4  
2.8  
3.3  
3.7  
fCNT (MHz)  
303.0  
303.0  
243.9  
188.7  
163.9  
Altera Corporation  
1
DS-MAX7000B-3.5  

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