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EPM570T144A3 PDF预览

EPM570T144A3

更新时间: 2024-09-16 10:33:31
品牌 Logo 应用领域
英特尔 - INTEL 可编程逻辑
页数 文件大小 规格书
86页 1210K
描述
Flash PLD, 5.4ns, 440-Cell, CMOS, PQFP144,

EPM570T144A3 技术参数

是否Rohs认证: 不符合生命周期:Active
包装说明:QFP, QFP144,.87SQ,20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.22
其他特性:YES系统内可编程:YES
JESD-30 代码:S-PQFP-G144JESD-609代码:e0
JTAG BST:YES湿度敏感等级:1
宏单元数:440端子数量:144
封装主体材料:PLASTIC封装代码:QFP
封装等效代码:QFP144,.87SQ,20封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):225
电源:1.5/3.3,2.5/3.3 V可编程逻辑类型:FLASH PLD
传播延迟:5.4 ns认证状态:Not Qualified
子类别:Programmable Logic Devices表面贴装:YES
技术:CMOS端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
Base Number Matches:1

EPM570T144A3 数据手册

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Section I. MAX II Device Family Data  
Sheet  
®
This section provides designers with the data sheet specifications for MAX II devices.  
The chapters contain feature definitions of the internal architecture, Joint Test Action  
Group (JTAG) and in-system programmability (ISP) information, DC operating  
conditions, AC timing parameters, and ordering information for MAX II devices.  
This section includes the following chapters:  
Chapter 1, Introduction  
Chapter 2, MAX II Architecture  
Chapter 3, JTAG and In-System Programmability  
Chapter 4, Hot Socketing and Power-On Reset in MAX II Devices  
Chapter 5, DC and Switching Characteristics  
Chapter 6, Reference and Ordering Information  
Revision History  
Refer to each chapter for its own specific revision history. For information about when  
each chapter was updated, refer to the Chapter Revision Dates section, which appears  
in the complete handbook.  
© October 2008 Altera Corporation  
MAX II Device Handbook  

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