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EPM570F256I3

更新时间： 2023-07-15 00:00:00

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EPM570F256I3 数据手册

Section I. MAX II Device Family Data

Sheet

This section provides designers with the data sheet specifications for MAX II devices.

The chapters contain feature definitions of the internal architecture, Joint Test Action

Group (JTAG) and in-system programmability (ISP) information, DC operating

conditions, AC timing parameters, and ordering information for MAX II devices.

This section includes the following chapters:

■

Chapter 1, Introduction

Chapter 2, MAX II Architecture

Chapter 3, JTAG and In-System Programmability

Chapter 4, Hot Socketing and Power-On Reset in MAX II Devices

Chapter 5, DC and Switching Characteristics

Chapter 6, Reference and Ordering Information

Revision History

Refer to each chapter for its own specific revision history. For information about when

each chapter was updated, refer to the Chapter Revision Dates section, which appears

in the complete handbook.

MAX II Device Handbook

12 3 4 5 6 7...86

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型号	品牌	获取价格	描述	数据表
EPM570F256I3N	INTEL	获取价格	Flash PLD, 5.4ns, 440-Cell, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, LEAD FREE, FBGA-256
EPM570F256I5N	INTEL	获取价格	Flash PLD, 8.7ns, 440-Cell, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, LEAD FREE, FBGA-256
EPM570G	ALTERA	获取价格	MAX II Device Family Data
EPM570G100C5N	ALTERA	获取价格	The MAX II family of instant-on, non-volatile CPLDs is based on a 0.18-m,
EPM570GF100A	ALTERA	获取价格	MAX II Device Family
EPM570GF100A3N	INTEL	获取价格	Flash PLD, 5.4ns, 440-Cell, CMOS, PBGA100, 11 X 11 MM, 1 MM PITCH, LEAD FREE, FBGA-100
EPM570GF100A5N	INTEL	获取价格	Flash PLD, 8.7ns, 440-Cell, CMOS, PBGA100, 11 X 11 MM, 1 MM PITCH, LEAD FREE, FBGA-100
EPM570GF100C	ALTERA	获取价格	MAX II Device Family
EPM570GF100C4ES	INTEL	获取价格	Flash PLD, PBGA100, 11 X 11 MM, 1 MM PITCH, FBGA-100
EPM570GF100C4N	INTEL	获取价格	Flash PLD, 7ns, 440-Cell, CMOS, PBGA100, 11 X 11 MM, 1 MM PITCH, LEAD FREE, FBGA-100